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/linux/Documentation/devicetree/bindings/bus/
H A Drenesas,bsc.yaml3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
6 title: Renesas Bus State Controller (BSC)
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
20 connected to the BSC can be accessed, the PM domain containing the BSC
21 must be powered on, and the functional clock driving the BSC must be
24 The bindings for the BSC extend the bindings for "simple-pm-bus".
33 - renesas,bsc-r8a73a4 # R-Mobile APE6 (r8a73a4)
34 - renesas,bsc-sh73a0 # SH-Mobile AG5 (sh73a0)
35 - const: renesas,bsc
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Dbrcm,brcmstb-i2c.yaml7 title: Broadcom STB BSC IIC Master Controller
25 - description: BSC register range
30 - const: bsc
92 reg-names = "bsc", "auto-i2c";
/linux/arch/sh/include/cpu-sh4/cpu/
H A Dsh7722.h10 * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
11 * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
148 /* BSC */
H A Dsh7723.h10 * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
11 * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
247 /* BSC */
H A Dsh7724.h10 * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
11 * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
113 /* BSC (PTA/PTB/PTJ/PTQ/PTR/PTT) */
/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-sh7206.c30 CMT0, CMT1, BSC, WDT, enumerator
61 INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
112 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
H A Dsetup-sh7203.c22 USB, LCDC, CMT0, CMT1, BSC, WDT, enumerator
63 INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
144 { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
H A Dsetup-sh7269.c26 USB, VDC4, CMT0, CMT1, BSC, WDT, enumerator
90 INTC_IRQ(BSC, 190), INTC_IRQ(WDT, 191),
219 { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { CMT0, CMT1, BSC, WDT } },
H A Dsetup-sh7264.c25 USB, VDC3, CMT0, CMT1, BSC, WDT, enumerator
81 INTC_IRQ(BSC, 177), INTC_IRQ(WDT, 178),
201 { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
/linux/drivers/zorro/
H A Dzorro.ids183 07fe BSC/Alfadata
185 0801 BSC/Alfadata
235 082c BSC/Alfadata
/linux/arch/sh/include/mach-common/mach/
H A Dmagicpanelr2.h30 /* BSC */
/linux/arch/sh/include/mach-ecovec24/mach/
H A Dpartner-jet-setup.txt29 LIST "BSC"
/linux/drivers/video/fbdev/
H A Dfm2fb.c2 * linux/drivers/video/fm2fb.c -- BSC FrameMaster II/Rainbow II frame buffer
27 * The BSC FrameMaster II (or Rainbow II) is a simple very dumb
/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas-soc.yaml46 - pattern: "^renesas,(d|s)?bsc(3)?-(r8a73a4|r8a7740|sh73a0)$"
/linux/arch/sh/include/cpu-sh2a/cpu/
H A Dsh7203.h80 /* BSC */
H A Dsh7264.h83 /* BSC */
H A Dsh7269.h98 /* BSC */
/linux/arch/sh/include/cpu-sh3/cpu/
H A Dsh7720.h71 /* BSC */
/linux/Documentation/filesystems/spufs/
H A Dspu_create.rst104 See http://www.bsc.es/projects/deepcomputing/linuxoncell/ for the rec-
H A Dspu_run.rst117 See http://www.bsc.es/projects/deepcomputing/linuxoncell/ for the rec-
/linux/arch/sh/drivers/pci/
H A Dfixups-se7751.c46 * here should not be hardcoded, but they should be taken from the bsc in pci_fixup_pcic()
H A Dpci-sh7751.c139 /* Set PCI WCRx, BCRx's, copy from BSC locations */ in sh7751_pci_init()
/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_dtv_encoder.c18 uint32_t bsc; member
/linux/arch/sh/include/asm/
H A Dpgtable_32.h82 #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
83 #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_kms.h164 uint32_t bsc; member

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