broken\-gen2 (full) in projects: freebsd

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Searched +full:broken +full:- +full:gen2 (Results 1 – 6 of 6) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/ata/
H A D	ahci-ceva.txt	4 - reg: Physical base address and size of the controller's register area. 5 - compatible: Compatibility string. Must be 'ceva,ahci-1v84'. 6 - clocks: Input clock specifier. Refer to common clock bindings. 7 - interrupts: Interrupt specifier. Refer to interrupt binding. 8 - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0. 9 - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1. 11 ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>; 16 - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0. 17 - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1. 19 ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>; [all …]
H A D	ceva,ahci-1v84.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/ceva,ahci- [all...]`
/freebsd/sys/contrib/dev/iwlwifi/queue/
H A D	tx.c
/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A D	tx.c	1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 14 #include "iwl-trans.h" 15 #include "iwl-nvm-utils.h" 18 #include "time-sync.h" 27 trig = iwl_fw_dbg_trigger_on(&mvm->fwrt, NULL, FW_DBG_TRIGGER_BA); in iwl_mvm_bar_check_trigger() 31 ba_trig = (void *)trig->data; in iwl_mvm_bar_check_trigger() 33 if (!(le16_to_cpu(ba_trig->tx_bar) & BIT(tid))) in iwl_mvm_bar_check_trigger() [all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A D	reg_addr.h	2 * Copyright (c) 2017-2018 Cavium, Inc. 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 116 … (0x1<<9) // Fast back-to-back transaction ena… 128 … (0x1<<23) // Fast back-to-back capable. Not ap… 145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… [all …]
/freebsd/sys/dev/bnxt/bnxt_en/
H A D	hsi_struct_def.h	`1 /- 34 Copyright(c) 2001-2024, Broadcom. All rights reserved. The 71 * * 0x0-0xFFF8 - The function ID 72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors 73 * * 0xFFFD - Reserved for user-space HWRM interface 74 * * 0xFFFF - HWRM 118 /* RoCE slow path command to query CC Gen2 support. / 120 / RoCE slow path command to modify CC Gen2 support. / 122 / Engine CKV - The Alias key EC curve and ECC public key information. / 124 / Engine CKV - Initialization vector. */ [all …]`