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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dcdns,hp-nfc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mtd/cdns,hp-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
13 - $ref: nand-controller.yaml
18 - const: cdns,hp-nfc
22 - description: Controller register set
23 - description: Slave DMA data port register set
25 reg-names:
[all …]
H A Dcadence-nand-controller.txt4 - compatible : "cdns,hp-nfc"
5 - reg : Contains two entries, each of which is a tuple consisting of a
9 - reg-names: should contain "reg" and "sdma"
10 - #address-cells: should be 1. The cell encodes the chip select connection.
11 - #size-cells : should be 0.
12 - interrupts : The interrupt number.
13 - clocks: phandle of the controller core clock (nf_clk).
16 - dmas: shall reference DMA channel associated to the NAND controller
17 - cdns,board-delay-ps : Estimated Board delay. The value includes the total
18 round trip delay for the signals and is used for deciding on values
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
H A Domap-gpmc.txt7 - compatible: Should be set to one of the following:
9 ti,omap2420-gpmc (omap2420)
10 ti,omap2430-gpmc (omap2430)
11 ti,omap3430-gpmc (omap3430 & omap3630)
12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x)
13 ti,am3352-gpmc (am335x devices)
15 - reg: A resource specifier for the register space
17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is
19 - #address-cells: Must be set to 2 to allow memory address translation
20 - #size-cells: Must be set to 1 to allow CS address passing
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dapm-xgene-enet.txt1 APM X-Gene SoC Ethernet nodes
3 Ethernet nodes are defined to describe on-chip ethernet interfaces in
4 APM X-Gene SoC.
7 - compatible: Should state binding information from the following list,
8 - "apm,xgene-enet": RGMII based 1G interface
9 - "apm,xgene1-sgenet": SGMII based 1G interface
10 - "apm,xgene1-xgenet": XFI based 10G interface
11 - reg: Address and length of the register set for the device. It contains the
12 information of registers in the same order as described by reg-names
13 - reg-names: Should contain the register set names
[all …]
H A Drenesas,etheravb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
[all …]
H A Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
H A Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h618-longanpi-3h.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "sun50i-h618-longan-module-3h.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/leds/common.h>
16 compatible = "sipeed,longan-pi-3h", "sipeed,longan-module-3h", "allwinner,sun50i-h618";
24 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
30 led-0 {
[all …]
H A Dsun55i-a527-cubie-a5e.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 /dts-v1/;
6 #include "sun55i-a523.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527";
20 stdout-path = "serial0:115200n8";
23 ext_osc32k: ext-osc32k-clk {
24 #clock-cells = <0>;
25 compatible = "fixed-clock";
26 clock-frequency = <32768>;
[all …]
H A Dsun55i-t527-avaota-a1.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 /dts-v1/;
6 #include "sun55i-a523.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "yuzukihd,avaota-a1", "allwinner,sun55i-t527";
20 stdout-path = "serial0:115200n8";
23 ext_osc32k: ext-osc32k-clk {
24 #clock-cells = <0>;
25 compatible = "fixed-clock";
26 clock-frequency = <32768>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dhihope-rzg2-ex.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the RZ/G2[HMN] HiHope sub board common parts
19 pinctrl-0 = <&avb_pins>;
20 pinctrl-names = "default";
21 phy-handle = <&phy0>;
22 tx-internal-delay-ps = <2000>;
23 rx-internal-delay-ps = <1800>;
26 phy0: ethernet-phy@0 {
27 compatible = "ethernet-phy-id001c.c915",
28 "ethernet-phy-ieee802.3-c22";
[all …]
H A Dr8a77970-v3msk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the V3M Starter Kit board
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
14 model = "Renesas V3M Starter Kit board";
27 stdout-path = "serial0:115200n8";
30 hdmi-out {
31 compatible = "hdmi-connector";
36 remote-endpoint = <&adv7511_out>;
41 lvds-decoder {
[all …]
H A Dr8a779a0-falcon.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Falcon CPU and BreakOut boards with R-Car V3U
8 /dts-v1/;
9 #include "r8a779a0-falcon-cpu.dtsi"
10 #include "r8a779a0-falcon-csi-dsi.dtsi"
11 #include "r8a779a0-falcon-ethernet.dtsi"
15 compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
23 pinctrl-0 = <&avb0_pins>;
24 pinctrl-names = "default";
25 phy-handle = <&phy0>;
[all …]
H A Dr8a77970-eagle.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Eagle board with R-Car V3M
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
14 model = "Renesas Eagle board based on r8a77970";
29 stdout-path = "serial0:115200n8";
32 d1p8: regulator-fixed {
33 compatible = "regulator-fixed";
34 regulator-name = "fixed-1.8V";
[all …]
H A Dgray-hawk-single.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the Gray Hawk Single board
6 * Copyright (C) 2024-2025 Glider bv
11 * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture
28 #include <dt-bindings/gpio/gpio.h>
29 #include <dt-bindings/input/input.h>
30 #include <dt-bindings/leds/common.h>
31 #include <dt-bindings/media/video-interfaces.h>
34 model = "Renesas Gray Hawk Single board";
35 compatible = "renesas,gray-hawk-single";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/
H A Dsocfpga_cyclone5_vining_fpga.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
70 regulator-name = "usb_nrst";
[all …]
H A Dsocfpga_cyclone5_sodia.dts1 // SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
11 model = "Altera SOCFPGA Cyclone V SoC Macnica Sodia board";
12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
30 compatible = "regulator-fixed";
31 regulator-name = "3.3V";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
[all …]
/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7100-starfive-visionfive-v1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include "jh7100-common.dtsi"
12 compatible = "starfive,visionfive-v1", "starfive,jh7100";
14 gpio-restart {
15 compatible = "gpio-restart";
22 phy-handle = <&phy>;
26 * The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
27 * manual adjustment of the RX internal delay to work properly. The default
28 * RX delay provided by the driver (1.95ns) is too high, but applying a 50%
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-385-atl-x530.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board.
4 (x530/AT-GS980MX)
9 /dts-v1/;
10 #include "armada-385.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
15 model = "x530/AT-GS980MX";
19 stdout-path = "serial1:115200n8";
32 internal-regs {
34 pinctrl-names = "default";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a-tsn.dts1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2016-2018 NXP Semiconductors
6 /dts-v1/;
10 model = "NXP LS1021A-TSN Board";
11 compatible = "fsl,ls1021a-tsn", "fsl,ls1021a";
13 sys_mclk: clock-mclk {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <24576000>;
19 reg_vdda_codec: regulator-3V3 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3-overo-base.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 * The Gumstix Overo must be combined with an expansion board.
17 led-controller {
18 compatible = "pwm-leds";
20 led-1 {
23 max-brightness = <127>;
24 linux,default-trigger = "mmc0";
29 compatible = "ti,omap-twl4030";
37 compatible = "regulator-fixed";
38 regulator-name = "hsusb2_vbus";
[all …]
H A Domap2420-n8x0-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 stdout-path = &uart3;
16 compatible = "i2c-cbus-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
25 interrupt-parent = <&gpio4>;
34 clock-frequency = <400000>;
44 clock-frequency = <400000>;
50 /* gpio-irq for dma: 26 */
53 #address-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-a83t-bananapi-m3.dts2 * Copyright 2017 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
51 model = "Banana Pi BPI-M3";
52 compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
64 compatible = "hdmi-connector";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 model = "Protonic WD3 board";
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
[all …]

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