1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Technologies, Inc. IPQ6018 TLMM block 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 12description: 13 Top Level Mode Multiplexer pin controller in Qualcomm IPQ6018 SoC. 14 15properties: 16 compatible: 17 const: qcom,ipq6018-pinctrl 18 19 reg: 20 maxItems: 1 21 22 interrupts: 23 maxItems: 1 24 25patternProperties: 26 "-state$": 27 oneOf: 28 - $ref: "#/$defs/qcom-ipq6018-tlmm-state" 29 - patternProperties: 30 "-pins$": 31 $ref: "#/$defs/qcom-ipq6018-tlmm-state" 32 additionalProperties: false 33 34$defs: 35 qcom-ipq6018-tlmm-state: 36 description: 37 Pinctrl node's client devices use subnodes for desired pin configuration. 38 Client device subnodes use below standard properties. 39 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 40 unevaluatedProperties: false 41 42 properties: 43 pins: 44 description: 45 List of gpio pins affected by the properties specified in this 46 subnode. 47 items: 48 oneOf: 49 - pattern: "^gpio([1-9]|[1-7][0-9]|80)$" 50 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, 51 sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2, 52 qdsd_data3 ] 53 minItems: 1 54 maxItems: 16 55 56 function: 57 description: 58 Specify the alternative function to be configured for the specified 59 pins. 60 enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, 61 atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac, 62 atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0, 63 atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp0_i2c, blsp1_i2c, 64 blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp0_spi, blsp1_spi, 65 blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi, 66 blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi, 67 blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi, 68 blsp0_uart, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst, 69 cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0, 70 cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v, 71 dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass, 72 flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, 73 gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0, 74 gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2, 75 ldo_en, ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc, 76 nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, 77 pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b, 78 pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a, 79 pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, 80 qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, 81 qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, 82 qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, 83 qdss_tracedata_a, qdss_tracedata_b, qpic_pad, reset_n, sd_card, 84 sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, 85 uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ] 86 87 required: 88 - pins 89 90allOf: 91 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 92 93required: 94 - compatible 95 - reg 96 97unevaluatedProperties: false 98 99examples: 100 - | 101 #include <dt-bindings/interrupt-controller/arm-gic.h> 102 tlmm: pinctrl@1000000 { 103 compatible = "qcom,ipq6018-pinctrl"; 104 reg = <0x01000000 0x300000>; 105 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 106 interrupt-controller; 107 #interrupt-cells = <2>; 108 gpio-controller; 109 #gpio-cells = <2>; 110 gpio-ranges = <&tlmm 0 0 80>; 111 112 serial3-state { 113 pins = "gpio44", "gpio45"; 114 function = "blsp2_uart"; 115 drive-strength = <8>; 116 bias-pull-down; 117 }; 118 }; 119