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/linux/drivers/video/fbdev/i810/
H A Di810_accel.c143 * source_copy_blit - BLIT transfer operation
158 * This is a BLIT operation typically used when doing
169 PUT_RING(BLIT | SOURCE_COPY_BLIT | 4); in source_copy_blit()
180 * color_blit - solid color BLIT operation
193 * A BLIT operation which can be used for color fill/rectangular fill
203 PUT_RING(BLIT | COLOR_BLT | 3); in color_blit()
244 PUT_RING(BLIT | MONO_SOURCE_COPY_IMMEDIATE | (4 + dsize)); in mono_src_copy_imm_blit()
H A Di810.h63 #define BLIT (0x02 << 29) macro
86 /* Blit */
/linux/drivers/gpu/drm/xe/tests/
H A Dxe_migrate.c503 fence = blt_copy(tile, sys_bo, vram_bo, false, "Blit copy from sysmem to vram", test); in test_migrate()
504 if (!sanity_fence_failed(xe, fence, "Blit copy from sysmem to vram", test)) { in test_migrate()
530 true, "Blit surf copy from vram to sysmem", test); in test_migrate()
569 true, "Blit surf copy from vram to sysmem", test); in test_migrate()
588 fence = blt_copy(tile, sys_bo, vram_bo, false, "Blit copy from sysmem to vram", test); in test_clear()
589 if (!sanity_fence_failed(xe, fence, "Blit copy from sysmem to vram", test)) { in test_clear()
596 fence = blt_copy(tile, vram_bo, sys_bo, false, "Blit copy from vram to sysmem", test); in test_clear()
597 if (!sanity_fence_failed(xe, fence, "Blit copy from vram to sysmem", test)) { in test_clear()
614 false, "Blit copy from vram to sysmem", test); in test_clear()
624 true, "Blit surf copy from vram to sysmem", test); in test_clear()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_asic.c228 .blit = &r100_copy_blit,
296 .blit = &r100_copy_blit,
392 .blit = &r100_copy_blit,
460 .blit = &r100_copy_blit,
528 .blit = &r100_copy_blit,
596 .blit = &r100_copy_blit,
664 .blit = &r100_copy_blit,
732 .blit = &r100_copy_blit,
800 .blit = &r100_copy_blit,
868 .blit = &r100_copy_blit,
[all …]
H A Dradeon_benchmark.c133 if (rdev->asic->copy.blit) { in radeon_benchmark_move()
141 sdomain, ddomain, "blit"); in radeon_benchmark_move()
H A Devergreen_blit_shaders.h31 * evergreen cards need to use the 3D engine to blit data which requires
H A Dcayman_blit_shaders.h31 * evergreen cards need to use the 3D engine to blit data which requires
/linux/drivers/video/fbdev/core/
H A Dsvgalib.c276 void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit) in svga_tileblit() argument
281 int attr = (0x0F & blit->bg) << 4 | (0x0F & blit->fg); in svga_tileblit()
283 fb += blit->sx * colstride + blit->sy * rowstride; in svga_tileblit()
286 for (dy = 0; dy < blit->height; dy++) { in svga_tileblit()
288 for (dx = 0; dx < blit->width; dx++) { in svga_tileblit()
289 fb_writeb(blit->indices[i], fb2); in svga_tileblit()
293 if (i == blit->length) in svga_tileblit()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv17.c41 { -1, -1, 0x005f, &nv04_gr_object }, /* blit */
46 { -1, -1, 0x009f, &nv04_gr_object }, /* blit */
H A Dnv15.c41 { -1, -1, 0x005f, &nv04_gr_object }, /* blit */
46 { -1, -1, 0x009f, &nv04_gr_object }, /* blit */
/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_kms.h28 * @cpu_blit: True if need cpu blit.
80 * This is where to populate clips for surface copy/dma or blit commands
96 * This is where to populate display unit update commands or blit
254 /* For CPU Blit */
/linux/arch/powerpc/include/uapi/asm/
H A Dps3fb.h19 #define PS3FB_IOCTL_FSEL _IOW('r', 6, int) /* blit and flip request */
/linux/Documentation/gpu/rfc/
H A Di915_small_bar.rst46 on recoverable contexts. In the future the kernel may want to blit during
/linux/include/video/
H A Dudlfb.h59 /* blit-only rendering path metrics, exposed through sysfs */
/linux/include/linux/
H A Dsvga.h112 void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit);
H A Dfb.h287 /* wait for blit idle, optional */
381 void (*fb_tileblit)(struct fb_info *info, struct fb_tileblit *blit);
/linux/drivers/video/fbdev/sis/
H A Dsis_accel.h44 #define BITBLT 0x00000000 /* Blit */
50 #define TRANSPARENT_BITBLT 0x00000006 /* Transparent Blit */
/linux/samples/auxdisplay/
H A Dcfag12864b-example.c169 * blit buffer to lcd
/linux/Documentation/fb/
H A Dudlfb.rst7 DisplayLink chips provide simple hline/blit operations with some compression,
/linux/drivers/gpu/drm/omapdrm/
H A Domap_fbdev.c261 * shuffling pages around in DMM rather than doing sw blit. in omap_fbdev_driver_fbdev_probe()
/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_drm.c398 NULL, 0, &drm->channel->blit); in nouveau_accel_gr_init()
407 PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle); in nouveau_accel_gr_init()
417 NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret); in nouveau_accel_gr_init()
/linux/drivers/block/
H A Dps3vram.c188 /* asking the HV for a blit will kick the FIFO */ in ps3vram_rewind_ring()
207 /* asking the HV for a blit will kick the FIFO */ in ps3vram_fire_ring()
/linux/include/uapi/drm/
H A Dradeon_drm.h331 /* Blits have strict offset rules. All blit offset must be aligned on
671 unsigned int x, y; /* Blit coordinates */
/linux/drivers/video/fbdev/
H A Dcg6.c197 u32 blit; member
383 i = sbus_readl(&fbc->blit); in cg6_copyarea()
/linux/drivers/gpu/drm/clients/
H A Ddrm_log.c88 WARN_ONCE(1, "Can't blit with pixel width %d\n", px_width); in drm_log_blit()

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