Searched full:bitstreams (Results 1 – 9 of 9) sorted by relevance
3 This simple SPI master controller is built into xtfpga bitstreams and is used
12 raw uncompressed formats in various compressed video bitstreams format.
68 no support for encoding continuous bitstreams with a symbol size != 8 at98 no support for decoding continuous bitstreams with a symbolsize != 8 at
117 * Display reminder for early engr test or demo chips / FPGA bitstreams
130 * actually seem to be connected for those Malta bitstreams. in get_c0_fdc_int()
27 * The trans buffer size of FHD and 4K bitstreams are different.
682 /* finish bitStreams one by one */ in HUF_decompress4X1_usingDTable_internal_body()814 /* Reload each of the 4 the bitstreams */ in HUF_decompress4X1_usingDTable_internal_fast_c_loop()1485 /* finish bitStreams one by one */ in HUF_decompress4X2_usingDTable_internal_body()1643 /* Decode 4 symbols from the final stream & reload bitstreams. in HUF_decompress4X2_usingDTable_internal_fast_c_loop()1694 /* finish bitStreams one by one */ in HUF_decompress4X2_usingDTable_internal_fast()
684 /* Add typegroup bits to the key/mask bitstreams */ in vcap_encode_rule_keyset() 842 /* Add typegroup bits to the entry bitstreams */ in vcap_encode_rule_actionset() 2485 /* Encode the bitstreams to the VCAP cache */ in vcap_mod_rule()
685 * for parsing bitstreams change internal state of VPU in some in cedrus_vp8_setup()