Home
last modified time | relevance | path

Searched full:bit3 (Results 1 – 25 of 102) sorted by relevance

12345

/linux/Documentation/driver-api/mtd/
H A Dnand_ecc.rst45 byte 0: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp4 ... rp14
46 byte 1: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp2 rp4 ... rp14
47 byte 2: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp4 ... rp14
48 byte 3: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp4 ... rp14
49 byte 4: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp5 ... rp14
51 byte 254: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp5 ... rp15
52 byte 255: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp5 ... rp15
67 Similarly cp1 is the sum of all bit1, bit3, bit5 and bit7.
70 - cp3 is the parity over bit2, bit3, bit6 and bit7.
71 - cp4 is the parity over bit0, bit1, bit2 and bit3.
[all …]
/linux/drivers/staging/rtl8723bs/include/
H A Dhal_pwr_seq.h46 …PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disabl…
52 …PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL …
61 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 int…
81 …AB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:…
82 …PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:1…
85 … PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04…
92 …{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3…
96 …{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3…
102 …PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:1…
112 …{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3…
[all …]
H A Drtw_ht.h66 #define LDPC_HT_CAP_TX BIT3
70 #define STBC_HT_CAP_TX BIT3
H A Dhal_com_reg.h223 #define RRSR_11M BIT3
291 #define RCR_AB BIT3 /* Accept broadcast packet */
554 #define SDIO_HISR_RXERR BIT3
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dpwrseq.h35 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
105 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
110 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
176 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
202 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
386 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0 \
404 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0 \
475 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3) \
479 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3 \
488 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4 \
[all …]
/linux/Documentation/input/devices/
H A Dsentelic.rst36 Bit3 => 1
42 Byte 4: Bit3~Bit0 => the scrolling wheel's movement since the last data report.
68 Bit3 => 1
77 Bit3 => the Horizontal scrolling movement rightward.
113 Bit3 => 1
120 Bit3~Bit2 => X coordinate (ypos[1:0])
137 Bit3 => 1
168 Bit3 => 1
175 Bit3~Bit2 => X coordinate (ypos[1:0])
193 Bit3 => 1
[all …]
/linux/Documentation/leds/
H A Dleds-mlxcpld.rst53 [bit3,bit2,bit1,bit0] or
98 [bit3,bit2,bit1,bit0] or
110 [bit3,bit2,bit1,bit0]:
/linux/drivers/staging/rtl8723bs/hal/
H A Dodm_DynamicBBPowerSaving.c38 pDM_PSTable->RegC70 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xc70, bMaskDWord)&BIT3)>>3; in ODM_RF_Saving()
66 PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, 0); /* RegC70[3]= 1'b0 */ in ODM_RF_Saving()
74 PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, pDM_PSTable->RegC70); in ODM_RF_Saving()
H A DHalHWImg8723B_MAC.c17 ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA */ in CheckPositive()
62 if ((cond1 & BIT3) != 0) /* APA */ in CheckPositive()
H A DHalBtc8723b2Ant.h12 #define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT3
/linux/sound/soc/sof/mediatek/mt8195/
H A Dmt8195-loader.c18 /* pull high RunStall (set bit3 to 1) */ in sof_hifixdsp_boot_sequence()
45 /* release RunStall (set bit3 to 0) */ in sof_hifixdsp_boot_sequence()
/linux/include/uapi/linux/
H A Dioam6.h59 bit3:1, member
100 bit3:1, member
/linux/drivers/video/fbdev/via/
H A Ddvi.c345 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
370 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
377 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
456 viafb_write_reg_mask(CRD2, VIACR, 0, BIT3); in viafb_dvi_enable()
H A Dlcd.c420 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); in load_lcd_scaling()
432 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); in load_lcd_scaling()
520 BIT0 + BIT1 + BIT2 + BIT3); in lcd_patch_skew()
615 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3); in integrated_lvds_disable()
663 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in integrated_lvds_enable()
758 viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3); in viafb_lcd_enable()
759 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in viafb_lcd_enable()
/linux/arch/mips/math-emu/
H A Dsp_2008class.c26 * bit3 = -NORM in ieee754sp_2008class()
H A Ddp_2008class.c26 * bit3 = -NORM in ieee754dp_2008class()
/linux/drivers/video/fbdev/
H A Dwm8505fb_regs.h19 * BIT3 GOVRH_DAC_CLKINV
/linux/drivers/gpu/drm/gma500/
H A Doaktrail.h92 /* Bit3: 24bpp */
122 /* Bit3: 24bpp */
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h34 #define BIT3 0x00000008 macro
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_debugfs.h57 bit3 : 1, member
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm6358.c56 #define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \ argument
62 BCM6358_MODE_MUX_##bit3), \
/linux/drivers/net/ethernet/sunplus/
H A Dspl2sw_mac.c198 /* VLAN group 0: cpu0 (bit3) + port0 (bit0) = 1001 = 0x9 in spl2sw_mac_hw_init()
199 * VLAN group 1: cpu0 (bit3) + port1 (bit1) = 1010 = 0xa in spl2sw_mac_hw_init()
/linux/drivers/scsi/
H A Ddc395x.h73 #define BIT3 0x00000008 macro
82 #define UNIT_RETRY BIT3
132 #define UNDER_RUN BIT3
168 #define WIDE_NEGO_DONE BIT3
595 #define ACTIVE_NEGATION BIT3
/linux/drivers/hwmon/
H A Dw83792d.c153 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
155 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
174 { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
177 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
178 { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
181 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
182 { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
185 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
/linux/drivers/gpu/drm/amd/display/dc/hpo/dcn31/
H A Ddcn31_hpo_dp_stream_encoder.c303 misc0 = misc0 | 0x8; /* bit3=1 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
308 misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
317 misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()

12345