| /linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hikey-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/pinctrl/hisi.h> 11 pinctrl-names = "default"; 12 pinctrl-0 = < 20 boot_sel_pmx_func: boot-sel-pins { 21 pinctrl-single,pins = < 26 emmc_pmx_func: emmc-pins { 27 pinctrl-single,pins = < 41 sd_pmx_func: sd-pins { 42 pinctrl-single,pins = < [all …]
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| H A D | hikey970-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/pinctrl/hisi.h> 10 range: gpio-range { 11 #pinctrl-single,gpio-range-cells = <3>; 15 compatible = "pinctrl-single"; 17 #pinctrl-cells = <1>; 18 #gpio-range-cells = <0x3>; 19 pinctrl-single,register-width = <0x20>; 20 pinctrl-single,function-mask = <0x7>; 22 pinctrl-single,gpio-range = <&range 0 82 0>; [all …]
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| H A D | hikey960-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/pinctrl/hisi.h> 12 range: gpio-range { 13 #pinctrl-single,gpio-range-cells = <3>; 17 compatible = "pinctrl-single"; 19 #pinctrl-cells = <1>; 20 #gpio-range-cells = <0x3>; 21 pinctrl-single,register-width = <0x20>; 22 pinctrl-single,function-mask = <0x7>; 24 pinctrl-single,gpio-range = < [all …]
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| H A D | poplar-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd. 8 #include <dt-bindings/pinctrl/hisi.h> 19 emmc_pins_1: emmc-pins-1 { 20 pinctrl-single,pins = < 31 pinctrl-single,bias-pulldown = < 34 pinctrl-single,bias-pullup = < 37 pinctrl-single,slew-rate = < 40 pinctrl-single,drive-strength = < 45 emmc_pins_2: emmc-pins-2 { [all …]
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| /linux/arch/arm/boot/dts/hisilicon/ |
| H A D | hi3620-hi4511.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012-2013 Linaro Ltd. 7 /dts-v1/; 13 compatible = "hisilicon,hi3620-hi4511"; 17 stdout-path = "serial0:115200n8"; 25 amba-bus { 31 pinctrl-names = "default", "sleep"; 32 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>; 33 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>; 38 pinctrl-names = "default", "sleep"; [all …]
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | am335x-pocketbeagle.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "am335x-osd335x-common.dtsi" 11 #include <dt-bindings/leds/common.h> 15 compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx"; 18 stdout-path = &uart0; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&usr_leds_pins>; 25 compatible = "gpio-leds"; [all …]
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| /linux/arch/arm64/boot/dts/marvell/mmp/ |
| H A D | pxa1908-samsung-coreprimevelte.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/input/linux-event-codes.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 21 stdout-path = "serial0:115200n8"; 24 compatible = "simple-framebuffer"; 39 reserved-memory { 40 #address-cells = <2>; 41 #size-cells = <2>; [all …]
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | as3722.txt | 4 ------------------- 5 - compatible: Must be "ams,as3722". 6 - reg: I2C device address. 7 - interrupt-controller: AS3722 has internal interrupt controller which takes the 8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well 10 - #interrupt-cells: Should be set to 2 for IRQ number and flags. 12 of AS3722 are defined at dt-bindings/mfd/as3722.h 14 interrupts.txt, using dt-bindings/irq. 17 -------------------- 18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on [all …]
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | ti,da850-pupd.txt | 1 * Pin configuration for TI DA850/OMAP-L138/AM18x 3 These SoCs have a separate controller for setting bias (internal pullup/down). 4 Bias can only be selected for groups rather than individual pins. 8 - compatible: Must be "ti,da850-pupd" 9 - reg: Base address and length of the memory resource used by the pullup/down 17 - groups: An array of strings, each string containing the name of a pin group. 21 pinctrl-bindings.txt in this directory. The supported parameters are 22 bias-disable, bias-pull-up, bias-pull-down. 26 ------- 30 pinconf: pin-controller@22c00c { [all …]
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| H A D | axis,artpec6-pinctrl.txt | 1 Axis ARTPEC-6 Pin Controller 4 - compatible: "axis,artpec6-pinctrl". 5 - reg: Should contain the register physical address and length for the pin 11 drive strength and bias pullup of the pin group. If either of these options is 15 Required subnode-properties: 16 - function: Function to mux. 17 - groups: Name of the pin group to use for the function above. 49 Optional subnode-properties (see pinctrl-bindings.txt): 50 - drive-strength: 4, 6, 8, 9 mA. For SD and NAND pins, this is for 3.3V VCCQ3. 51 - bias-pull-up [all …]
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| H A D | pinctrl-palmas.txt | 7 - compatible: It must be one of following: 8 - "ti,palmas-pinctrl" for Palma series of the pincontrol. 9 - "ti,tps65913-pinctrl" for Palma series device TPS65913. 10 - "ti,tps80036-pinctrl" for Palma series device TPS80036. 12 Please refer to pinctrl-bindings.txt in this directory for details of the 19 those pin(s), and various pin configuration parameters, such as pull-up, 28 Similarly, a pin subnode that describes a pullup parameter implies no 32 - ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode. 35 - ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode. 38 - ti,palmas-override-powerhold: This is applicable for PMICs for which [all …]
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| H A D | pinctrl-single.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 21 - enum: 22 - pinctrl-single 23 - pinconf-single 24 - items: 25 - enum: [all …]
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| H A D | actions,s900-pinctrl.txt | 7 - compatible: Should be "actions,s900-pinctrl" 8 - reg: Should contain the register base address and size of 10 - clocks: phandle of the clock feeding the pin controller 11 - gpio-controller: Marks the device node as a GPIO controller. 12 - gpio-ranges: Specifies the mapping between gpio controller and 13 pin-controller pins. 14 - #gpio-cells: Should be two. The first cell is the gpio pin number 16 - interrupt-controller: Marks the device node as an interrupt controller. 17 - #interrupt-cells: Specifies the number of cells needed to encode an 21 bindings/interrupt-controller/interrupts.txt [all …]
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| H A D | actions,s700-pinctrl.txt | 7 - compatible: Should be "actions,s700-pinctrl" 8 - reg: Should contain the register base address and size of 10 - clocks: phandle of the clock feeding the pin controller 11 - gpio-controller: Marks the device node as a GPIO controller. 12 - gpio-ranges: Specifies the mapping between gpio controller and 13 pin-controller pins. 14 - #gpio-cells: Should be two. The first cell is the gpio pin number 16 - interrupt-controller: Marks the device node as an interrupt controller. 17 - #interrupt-cells: Specifies the number of cells needed to encode an 21 bindings/interrupt-controller/interrupts.txt [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc7180-trogdor.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include <dt-bindings/sound/sc7180-lpass.h> 16 #include "sc7180-firmware-tfa.dtsi" 22 thermal-zones { 23 charger_thermal: charger-thermal { [all …]
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| H A D | sc7280-herobrine-crd.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "sc7280-herobrine.dtsi" 11 #include "sc7280-herobrine-audio-wcd9385.dtsi" 12 #include "sc7280-herobrine-lte-sku.dtsi" 27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator { 28 compatible = "regulator-fixed"; 29 regulator-name = "vreg_edp_bl_crd"; 32 enable-active-high; 33 pinctrl-names = "default"; [all …]
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | cirrus,cs42l43.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 21 - $ref: dai-common.yaml# 26 - cirrus,cs42l43 31 vdd-p-supply: 35 vdd-a-supply: 39 vdd-d-supply: 43 vdd-io-supply: [all …]
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8183-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; 27 stdout-path = "serial0:921600n8"; 30 reserved-memory { 31 #address-cells = <2>; 32 #size-cells = <2>; 35 compatible = "shared-dma-pool"; 37 no-map; [all …]
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| /linux/arch/arm/boot/dts/intel/pxa/ |
| H A D | pxa300-raumfeld-controller.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include "pxa300-raumfeld-common.dtsi" 9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300"; 11 reg_vbatt: regulator-vbatt { 12 compatible = "regulator-fixed"; 13 regulator-name = "vbatt-fixed-supply"; 14 regulator-min-microvolt = <3700000>; 15 regulator-max-microvolt = <3700000>; 16 regulator-always-on; [all …]
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common-v2.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/pinctrl/mt65xx.h> 19 #include "mtk-eint.h" 20 #include "pinctrl-mtk-common-v2.h" 23 * struct mtk_drive_desc - the structure that holds the information 30 * formula: output = ((input) / step - 1) * scal 50 writel_relaxed(val, pctl->base[i] + reg); in mtk_w32() 55 return readl_relaxed(pctl->base[i] + reg); in mtk_r32() 63 spin_lock_irqsave(&pctl->lock, flags); in mtk_rmw() 70 spin_unlock_irqrestore(&pctl->lock, flags); in mtk_rmw() [all …]
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| /linux/drivers/acpi/acpica/ |
| H A D | utresdecode.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 4 * Module Name: utresdecode - Resource descriptor keyword strings 28 "0 - Good Configuration", 29 "1 - Acceptable Configuration", 30 "2 - Suboptimal Configuration", 31 "3 - ***Invalid Configuration***", 137 "PullUp", 272 "Bias Pull-up", 273 "Bias Pull-down", 274 "Bias Default", [all …]
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| /linux/arch/mips/boot/dts/mobileye/ |
| H A D | eyeq6h-pins.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 9 * [0] | MUX_SEL | 0 - GPIO, 1 - alternative func 14 * [13:12] | PUD | pull-up/pull-down. 0, 3 - no, 1 - PD, 2 - PU 20 // TODO: use pinctrl-single,bias-pullup 21 // TODO: use pinctrl-single,bias-pulldown 22 // TODO: use pinctrl-single,drive-strength 23 // TODO: use pinctrl-single,input-schmitt 25 i2c0_pins: i2c0-pins { 26 pinctrl-single,pins = < 31 i2c1_pins: i2c1-pins { [all …]
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| /linux/Documentation/firmware-guide/acpi/ |
| H A D | gpio-properties.rst | 1 .. SPDX-License-Identifier: GPL-2.0 23 GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 25 GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 34 Package () { "reset-gpios", Package () { ^BTH, 1, 1, 0 } }, 35 Package () { "shutdown-gpios", Package () { ^BTH, 0, 0, 0 } }, 52 If 1, the GPIO is marked as active-low. 55 active-low or active-high, the "active_low" argument can be used here. 56 Setting it to 1 marks the GPIO as active-low. 61 In our Bluetooth example the "reset-gpios" refers to the second GpioIo() [all …]
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-da850-pupd.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Pinconf driver for TI DA850/OMAP-L138/AM18XX pullup/pulldown groups 15 #include <linux/pinctrl/pinconf-generic.h> 73 val = readl(data->base + DA850_PUPD_ENA); in da850_pupd_pin_config_group_get() 82 /* bias is disabled */ in da850_pupd_pin_config_group_get() 86 val = readl(data->base + DA850_PUPD_SEL); in da850_pupd_pin_config_group_get() 92 return -EINVAL; in da850_pupd_pin_config_group_get() 110 ena = readl(data->base + DA850_PUPD_ENA); in da850_pupd_pin_config_group_set() 111 sel = readl(data->base + DA850_PUPD_SEL); in da850_pupd_pin_config_group_set() 129 return -EINVAL; in da850_pupd_pin_config_group_set() [all …]
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| /linux/arch/arm/boot/dts/st/ |
| H A D | ste-hrefv60plus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2012 ST-Ericsson AB 6 #include "ste-href.dtsi" 9 model = "ST-Ericsson HREF (v60+) platform with Device Tree"; 10 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; 12 thermal-zones { 13 chassis-thermal { 15 polling-delay = <20000>; 17 polling-delay-passive = <2000>; 19 thermal-sensors = <&therm1>, <&therm2>; [all …]
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