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/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhikey-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
11 pinctrl-names = "default";
12 pinctrl-0 = <
20 boot_sel_pmx_func: boot-sel-pins {
21 pinctrl-single,pins = <
26 emmc_pmx_func: emmc-pins {
27 pinctrl-single,pins = <
41 sd_pmx_func: sd-pins {
42 pinctrl-single,pins = <
[all …]
H A Dhikey970-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
10 range: gpio-range {
11 #pinctrl-single,gpio-range-cells = <3>;
15 compatible = "pinctrl-single";
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
22 pinctrl-single,gpio-range = <&range 0 82 0>;
[all …]
H A Dhikey960-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range {
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
24 pinctrl-single,gpio-range = <
[all …]
H A Dpoplar-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/pinctrl/hisi.h>
19 emmc_pins_1: emmc-pins-1 {
20 pinctrl-single,pins = <
31 pinctrl-single,bias-pulldown = <
34 pinctrl-single,bias-pullup = <
37 pinctrl-single,slew-rate = <
40 pinctrl-single,drive-strength = <
45 emmc_pins_2: emmc-pins-2 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/hisilicon/
H A Dhi3620-hi4511.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Linaro Ltd.
7 /dts-v1/;
13 compatible = "hisilicon,hi3620-hi4511";
17 stdout-path = "serial0:115200n8";
25 amba-bus {
31 pinctrl-names = "default", "sleep";
32 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
33 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
38 pinctrl-names = "default", "sleep";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
H A Dti,da850-pupd.txt1 * Pin configuration for TI DA850/OMAP-L138/AM18x
3 These SoCs have a separate controller for setting bias (internal pullup/down).
4 Bias can only be selected for groups rather than individual pins.
8 - compatible: Must be "ti,da850-pupd"
9 - reg: Base address and length of the memory resource used by the pullup/down
17 - groups: An array of strings, each string containing the name of a pin group.
21 pinctrl-bindings.txt in this directory. The supported parameters are
22 bias-disable, bias-pull-up, bias-pull-down.
26 -------
30 pinconf: pin-controller@22c00c {
[all …]
H A Dqcom,ipq8064-pinctrl.txt4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
19 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
[all …]
H A Daxis,artpec6-pinctrl.txt1 Axis ARTPEC-6 Pin Controller
4 - compatible: "axis,artpec6-pinctrl".
5 - reg: Should contain the register physical address and length for the pin
11 drive strength and bias pullup of the pin group. If either of these options is
15 Required subnode-properties:
16 - function: Function to mux.
17 - groups: Name of the pin group to use for the function above.
49 Optional subnode-properties (see pinctrl-bindings.txt):
50 - drive-strength: 4, 6, 8, 9 mA. For SD and NAND pins, this is for 3.3V VCCQ3.
51 - bias-pull-up
[all …]
H A Dqcom,msm8660-pinctrl.txt4 - compatible: "qcom,msm8660-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
19 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
[all …]
H A Dqcom,apq8064-pinctrl.txt4 - compatible: "qcom,apq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
19 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
[all …]
H A Dqcom,ipq4019-pinctrl.txt7 - compatible: "qcom,ipq4019-pinctrl"
8 - reg: Should be the base address and length of the TLMM block.
9 - interrupts: Should be the parent IRQ of the TLMM block.
10 - interrupt-controller: Marks the device node as an interrupt controller.
11 - #interrupt-cells: Should be two.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells : Should be two.
16 - gpio-ranges: see ../gpio/gpio.txt
20 - gpio-reserved-ranges: see ../gpio/gpio.txt
22 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
[all …]
H A Dqcom,msm8974-pinctrl.txt4 - compatible: "qcom,msm8974-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
19 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-pocketbeagle.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
7 /dts-v1/;
10 #include "am335x-osd335x-common.dtsi"
11 #include <dt-bindings/leds/common.h>
15 compatible = "ti,am335x-pocketbeagle", "ti,am335x-bon
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Das3722.txt4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
H A Dsc7280-herobrine-herobrine-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
24 #include "sc7280-chrome-common.dtsi"
28 compatible = "google,herobrine-rev0", "qcom,sc7280";
[all …]
H A Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpi
[all...]
H A Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
[all …]
H A Dsc7180-acer-aspire1.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/sound/qcom,q6asm.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 /delete-node/ &tz_mem;
15 /delete-node/ &ipa_fw_mem;
20 chassis-type = "laptop";
30 stdout-path = "serial0:115200n8";
33 reserved-memory {
[all …]
H A Dsc7280-herobrine.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcirrus,cs42l43.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
21 - $ref: dai-common.yaml#
26 - cirrus,cs42l43
31 vdd-p-supply:
35 vdd-a-supply:
39 vdd-d-supply:
43 vdd-io-supply:
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
37 no-map;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/pxa/
H A Dpxa300-raumfeld-controller.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300";
11 reg_vbatt: regulator-vbatt {
12 compatible = "regulator-fixed";
13 regulator-name = "vbatt-fixed-supply";
14 regulator-min-microvolt = <3700000>;
15 regulator-max-microvolt = <3700000>;
16 regulator-always-on;
[all …]
/freebsd/sys/arm64/rockchip/
H A Drk_pinctrl.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
114 #define RK_PINCTRL_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
115 #define RK_PINCTRL_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
116 #define RK_PINCTRL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
181 /* 5,0 - Empty */
184 /* 5,3 - Empty */
188 /* 6,3 - Empty */
192 /* 7,3 - Empty */
195 /* 8,2 - Empty */
[all …]

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