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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>;
[all …]
H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
[all …]
H A Dsc7280-herobrine-audio-wcd9385.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /* BOARD-SPECIFIC TOP LEVEL NODES */
11 compatible = "google,sc7280-herobrine";
12 model = "sc7280-wcd938x-max98360a-1mic";
14 audio-routing =
35 #address-cells = <1>;
36 #size-cells = <0>;
38 dai-link@0 {
39 link-name = "MAX98360A";
43 sound-dai = <&lpass_cpu MI2S_SECONDARY>;
[all …]
H A Dqcs6490-rb3gen2.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
6 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 #include "qcs6490-audioreach.dtsi"
24 /delete-node/ &ipa_fw_mem;
[all …]
H A Dqcm6490-particle-tachyon.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
10 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18 /delete-node/ &ipa_fw_mem;
19 /delete-node/ &rmtfs_mem;
20 /delete-node/ &xbl_mem;
[all …]
H A Dqcm6490-shift-otter.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &rmtfs_mem;
28 chassis-type = "handset";
36 #address-cells = <2>;
[all …]
H A Dqrb2210-rb1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 compatible = "qcom,qrb2210-rb1", "qcom,qrb2210", "qcom,qcm2290";
25 stdout-path = "serial0:115200n8";
29 clk40m: can-clk {
30 compatible = "fixed-clock";
31 clock-frequency = <40000000>;
32 #clock-cells = <0>;
[all …]
H A Dqrb4210-rb2.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/usb/pd.h>
19 compatible = "qcom,qrb4210-rb2", "qcom,qrb4210", "qcom,sm4250";
27 stdout-path = "serial0:115200n8";
31 clk40m: can-clk {
[all …]
H A Dqcm6490-fairphone-fp5.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 #include <dt-bindings/sound/qcom,q6asm.h>
18 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
25 /delete-node/ &rmtfs_mem;
[all …]
H A Dsc8280xp-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sc8280xp-pmics.dtsi"
17 compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
27 compatible = "pwm-backlight";
29 enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
30 power-supply = <&vreg_edp_bl>;
32 pinctrl-names = "default";
[all …]
H A Dsm8750.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8750-gcc.h>
8 #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,sm8750-rpmh.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
[all …]
H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
9 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
11 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
13 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
14 #include <dt-bindings/dma/qcom-gpi.h>
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsophgo,cv1800-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/sophgo,cv1800-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@outlook.com>
15 - sophgo,cv1800b-pinctrl
16 - sophgo,cv1812h-pinctrl
17 - sophgo,sg2000-pinctrl
18 - sophgo,sg2002-pinctrl
22 - description: pinctrl for system domain
[all …]
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
H A Dintel,pinctrl-keembay.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
19 const: intel,keembay-pinctrl
24 gpio-controller: true
26 '#gpio-cells':
39 interrupt-controller: true
41 '#interrupt-cells':
[all …]
H A Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
30 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
33 pin-settings:
40 '-pins$':
43 - $ref: pincfg-node.yaml#
44 - $ref: pinmux-node.yaml#
63 dmic6, io, dsp-gpio, irq1, irq2, fll1-clk,
[all …]
H A Dimg,pistachio-pinctrl.txt8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
[all …]
H A Dactions,s900-pinctrl.txt7 - compatible: Should be "actions,s900-pinctrl"
8 - reg: Should contain the register base address and size of
10 - clocks: phandle of the clock feeding the pin controller
11 - gpio-controller: Marks the device node as a GPIO controller.
12 - gpio-ranges: Specifies the mapping between gpio controller and
13 pin-controller pins.
14 - #gpio-cells: Should be two. The first cell is the gpio pin number
16 - interrupt-controller: Marks the device node as an interrupt controller.
17 - #interrupt-cells: Specifies the number of cells needed to encode an
21 bindings/interrupt-controller/interrupts.txt
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
8 #include <dt-bindings/mfd/qcom-rpm.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
19 stdout-path = "serial0:115200n8";
23 vph: regulator-fixed {
[all …]
/linux/arch/riscv/boot/dts/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
[all …]
H A Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
27 stdout-path = "serial0:115200n8";
33 bootph-pre-ram;
36 gpio-restart {
37 compatible = "gpio-restart";
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cirrus Logic Madera class audio CODECs Multi-Functional Device
10 - patches@opensource.cirrus.com
23 - $ref: /schemas/pinctrl/cirrus,madera.yaml#
24 - $ref: /schemas/regulator/wlf,arizona.yaml#
25 - $ref: /schemas/sound/cirrus,madera.yaml#
26 - if:
31 - cirrus,cs47l85
[all …]
/linux/drivers/acpi/acpica/
H A Dutresdecode.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: utresdecode - Resource descriptor keyword strings
28 "0 - Good Configuration",
29 "1 - Acceptable Configuration",
30 "2 - Suboptimal Configuration",
31 "3 - ***Invalid Configuration***",
165 /* Serial bus type */
168 "/* UNKNOWN serial bus type */",
175 /* I2C serial bus access mode */
182 /* I2C serial bus slave mode */
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d2_xplained.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
8 /dts-v1/;
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/mfd/atmel-flexcom.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
28 stdout-path = "serial0:115200n8";
[all …]

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