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Searched +full:berlin2 +full:- +full:reset (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/reset/
H A Dmarvell,berlin2-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/reset/marvell,berlin2-reset.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Marvell Berlin reset controller
11 - Antoine Tenart <atenart@kernel.org>
13 description: The reset controller node must be a sub-node of the chip
18 const: marvell,berlin2-reset
20 "#reset-cells":
24 - compatible
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/linux/Documentation/devicetree/bindings/arm/
H A Dsyna.txt3 According to https://www.synaptics.com/company/news/conexant-marvell
7 ---------------------------------------------------------------
17 "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100),
18 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
20 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
26 model = "Sony NSZ-GS7";
27 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
38 - compatible: should be "marvell,berlin-cpu-ctrl"
39 - reg: address and length of the register set
43 cpu-ctrl@f7dd0000 {
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/linux/arch/arm/boot/dts/synaptics/
H A Dberlin2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 compatible = "marvell,berlin2", "marvell,berlin";
17 #address-cells = <1>;
18 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,berlin-smp";
34 next-level-cache = <&l2>;
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H A Dberlin2cd.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 model = "Marvell Armada 1500-mini (BG2CD) SoC";
17 #address-cells = <1>;
18 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a9";
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H A Dberlin2q.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 #include <dt-bindings/clock/berlin2q.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 model = "Marvell Armada 1500 pro (BG2-Q) SoC";
12 #address-cells = <1>;
13 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23 enable-method = "marvell,berlin-smp";
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/linux/Documentation/devicetree/bindings/phy/
H A Dberlin-usb-phy.txt4 - compatible: "marvell,berlin2-usb-phy" or "marvell,berlin2cd-usb-phy"
5 - reg: base address and length of the registers
6 - #phys-cells: should be 0
7 - resets: reference to the reset controller
11 usb-phy@f774000 {
12 compatible = "marvell,berlin2-usb-phy";
14 #phy-cells = <0>;
/linux/drivers/reset/
H A Dreset-berlin.c4 * Marvell Berlin reset driver
6 * Antoine Tenart <antoine.tenart@free-electrons.com>
22 #include <linux/reset-controller.h>
43 regmap_write(priv->regmap, offset, mask); in berlin_reset_reset()
45 /* let the reset be effective */ in berlin_reset_reset()
52 .reset = berlin_reset_reset,
60 offset = reset_spec->args[0]; in berlin_reset_xlate()
61 bit = reset_spec->args[1]; in berlin_reset_xlate()
64 return -EINVAL; in berlin_reset_xlate()
74 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in berlin2_reset_probe()
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/linux/Documentation/devicetree/bindings/ata/
H A Dahci-platform.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 SATA nodes are defined to describe on-chip Serial ATA controllers.
13 It is possible, but not required, to represent each port as a sub-node.
18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>
26 - brcm,iproc-ahci
27 - cavium,octeon-7130-ahci
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/linux/drivers/phy/marvell/
H A Dphy-berlin-usb.c1 // SPDX-License-Identifier: GPL-2.0
5 * Antoine Tenart <antoine.tenart@free-electrons.com>
15 #include <linux/reset.h>
119 reset_control_reset(priv->rst_ctrl); in phy_berlin_usb_power_on()
121 writel(priv->pll_divider, in phy_berlin_usb_power_on()
122 priv->base + USB_PHY_PLL); in phy_berlin_usb_power_on()
124 CLK_BLK_EN, priv->base + USB_PHY_PLL_CONTROL); in phy_berlin_usb_power_on()
126 priv->base + USB_PHY_ANALOG); in phy_berlin_usb_power_on()
129 INTPL_CUR_30, priv->base + USB_PHY_RX_CTRL); in phy_berlin_usb_power_on()
131 writel(TX_VDD12_13 | TX_OUT_AMP(0x3), priv->base + USB_PHY_TX_CTRL1); in phy_berlin_usb_power_on()
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