Searched +full:bcm6328 +full:- +full:clocks (Results 1 – 9 of 9) sorted by relevance
/linux/arch/mips/boot/dts/brcm/ |
H A D | bcm6328.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6328-clock.h" 4 #include "dt-bindings/reset/bcm6328-reset.h" 5 #include "dt-bindings/soc/bcm6328-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 10 compatible = "brcm,bcm6328"; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <160000000>; [all …]
|
H A D | bcm63268.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm63268-clock.h" 4 #include "dt-bindings/reset/bcm63268-reset.h" 5 #include "dt-bindings/soc/bcm63268-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <200000000>; 31 clocks { [all …]
|
H A D | bcm6362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6362-clock.h" 4 #include "dt-bindings/reset/bcm6362-reset.h" 5 #include "dt-bindings/soc/bcm6362-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <200000000>; 31 clocks { [all …]
|
/linux/Documentation/devicetree/bindings/spi/ |
H A D | brcm,bcm63xx-hsspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - William Zhang <william.zhang@broadcom.com> 11 - Kursad Oney <kursad.oney@broadcom.com> 12 - Jonas Gorski <jonas.gorski@gmail.com> 16 early MIPS based chips such as BCM6328 and BCM63268. This initial rev 1.0 19 brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to 20 use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as [all …]
|
/linux/Documentation/devicetree/bindings/phy/ |
H A D | brcm,bcm63xx-usbh-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/brcm,bcm63xx-usbh-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Álvaro Fernández Rojas <noltari@gmail.com> 15 - brcm,bcm6318-usbh-phy 16 - brcm,bcm6328-usbh-phy 17 - brcm,bcm6358-usbh-phy 18 - brcm,bcm6362-usbh-phy 19 - brcm,bcm6368-usbh-phy [all …]
|
/linux/drivers/clk/bcm/ |
H A D | clk-bcm63xx-gate.c | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <linux/clk-provider.h> 8 #include <dt-bindings/clock/bcm3368-clock.h> 9 #include <dt-bindings/clock/bcm6318-clock.h> 10 #include <dt-bindings/clock/bcm6328-clock.h> 11 #include <dt-bindings/clock/bcm6358-clock.h> 12 #include <dt-bindings/clock/bcm6362-clock.h> 13 #include <dt-bindings/clock/bcm6368-clock.h> 14 #include <dt-bindings/clock/bcm63268-clock.h> 168 .name = "adsl-ubus", [all …]
|
/linux/Documentation/devicetree/bindings/usb/ |
H A D | generic-ehci.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org> 13 - $ref: usb-hcd.yaml 14 - if: 19 const: ibm,usb-ehci-440epx 28 - items: 29 - enum: [all …]
|
/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm63138.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 interrupt-parent = <&gic>; 22 #address-cells = <1>; 23 #size-cells = <0>; 27 compatible = "arm,cortex-a9"; 28 next-level-cache = <&L2>; [all …]
|
/linux/arch/mips/include/asm/mach-bcm63xx/ |
H A D | bcm63xx_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 91 * control register which is 16-bits wide. That way we do not have any 92 * specific BCM6345 code for handling clocks, and writing 0 to the test 463 /* Watchdog soft reset register (BCM6328 only) */ 996 /* Endpoint<->DMA mappings */ 1003 /* Misc per-endpoint settings */ 1267 #define SPI_6348_CMD 0x00 /* 16-bits register */ 1276 #define SPI_6348_MSG_CTL 0x40 /* 8-bits register */ 1284 #define SPI_6358_MSG_CTL 0x00 /* 16-bits register */ 1290 #define SPI_6358_CMD 0x700 /* 16-bits register */
|