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Searched +full:bcm2835 +full:- +full:aux (Results 1 – 10 of 10) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
14 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
15 * bcm2835.dtsi and bcm2836.dtsi.
19 compatible = "brcm,bcm2835";
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,bcm2835-aux-clock.txt1 Broadcom BCM2835 auxiliary peripheral support
4 Documentation/devicetree/bindings/clock/clock-bindings.txt
11 - compatible: Should be "brcm,bcm2835-aux"
12 - #clock-cells: Should be <1>. The permitted clock-specifier values can be
13 found in include/dt-bindings/clock/bcm2835-aux.h
14 - reg: Specifies base physical address and size of the registers
15 - clocks: The parent clock phandle
20 compatible = "brcm,bcm2835-cprman";
21 #clock-cells = <1>;
26 aux: aux@7e215004 {
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H A Dbrcm,bcm2835-aux-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,bcm2835-aux-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM2835 auxiliary peripheral clock
10 - Stefan Wahren <wahrenst@gmx.net>
11 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
20 const: brcm,bcm2835-aux
25 "#clock-cells":
32 - compatible
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/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Dbrcm,bcm2835-aux-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/brcm,bcm2835-aux-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2835 AUXILIARY UART
10 - Pratik Farkase <pratikfarkase94@gmail.com>
11 - Florian Fainelli <florian.fainelli@broadcom.com>
12 - Stefan Wahren <wahrenst@gmx.net>
15 - $ref: serial.yaml
19 const: brcm,bcm2835-aux-uart
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H A Dbrcm,bcm2835-aux-uart.txt1 * BCM2835 AUXILIAR UART
5 - compatible: "brcm,bcm2835-aux-uart"
6 - reg: The base address of the UART register bank.
7 - interrupts: A single interrupt specifier.
8 - clocks: Clock driving the hardware; used to figure out the baud rate
14 compatible = "brcm,bcm2835-aux-uart";
17 clocks = <&aux BCM2835_AUX_CLOCK_UART>;
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dbrcm,bcm2835-aux-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,bcm2835-aux-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM2835 Auxiliary SPI1/2 Controller
10 - Karan Sanghavi <karansanghvi98@gmail.com>
13 The BCM2835 contains two forms of SPI master controller. One is known simply
19 - $ref: spi-controller.yaml#
24 - brcm,bcm2835-aux-spi
36 - compatible
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H A Dbrcm,bcm2835-aux-spi.txt1 Broadcom BCM2835 auxiliary SPI1/2 controller
3 The BCM2835 contains two forms of SPI master controller, one known simply as
8 - compatible: Should be "brcm,bcm2835-aux-spi".
9 - reg: Should contain register location and length for the spi block
10 - interrupts: Should contain shared interrupt of the aux bloc
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dbrcm,bcm2835-armctrl-ic.txt1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
9 interrupts, but the per-CPU interrupt controller is the root, and an
14 - compatible : should be "brcm,bcm2835-armctrl-i
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H A Dbrcm,bcm2835-armctrl-ic.yaml2 ---
3 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: BCM2835 ARMCTRL Interrupt Controller
9 - Florian Fainelli <florian.fainelli@broadcom.com>
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
13 The BCM2835 contains a custom top-level interrupt controller, which supports
14 72 interrupt sources using a 2-level register scheme. The interrupt
19 but the per-CPU interrupt controller is the root, and an interrupt there
62 27: DMA11-14 - shared interrupt for DMA 11 to 14
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/freebsd/sys/dev/uart/
H A Duart_dev_mu.c1 /*-
33 * - 7 or 8 bit operation.
34 * - 1 start and 1 stop bit.
35 * - No parities.
36 * - Break generation.
37 * - 8 symbols deep FIFOs for receive and transmit.
38 * - SW controlled RTS, SW readable CTS.
39 * - Auto flow control with programmable FIFO level.
40 * - 16550 like registers.
41 * - Baudrate derived from system clock.
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