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Searched +full:axistream +full:- +full:connected (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dxlnx,axi-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
35 axistream-connected is specified, in which case the reg
42 - description: Ethernet core interrupt
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H A Dxilinx_axienet.txt2 --------------------------------------------------------
18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a",
19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a"
20 - reg : Address and length of the IO space, as well as the address
22 axistream-connected is specified, in which case the reg
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
25 and optionally Ethernet core. If axistream-connected is
29 - phy-handle : Should point to the external phy device if exists. Pointing
32 - xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the hardware
35 - phy-mode : See ethernet.txt
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/freebsd/sys/dev/xilinx/
H A Dif_xae.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2019-2025 Ruslan Bukin <br@bsdpad.com>
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
72 bus_read_4((_sc)->res[0], _reg)
74 bus_write_4((_sc)->res[0], _reg, _val)
77 bus_read_8((_sc)->res[0], _reg)
79 bus_write_8((_sc)->res[0], _reg, _val)
81 #define XAE_LOCK(sc) mtx_lock(&(sc)->mtx)
82 #define XAE_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
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