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Searched +full:avddio +full:- +full:pex +full:- +full:supply (Results 1 – 13 of 13) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dnvidia,tegra124-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
20 - description: NVIDIA Tegra124
21 const: nvidia,tegra124-xusb
23 - description: NVIDIA Tegra132
25 - const: nvidia,tegra132-xusb
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H A Dnvidia,tegra124-xusb.txt8 --------------------
9 - compatible: Must be:
10 - Tegra124: "nvidia,tegra124-xusb"
11 - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12 - Tegra210: "nvidia,tegra210-xusb"
13 - Tegra186: "nvidia,tegra186-xusb"
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
16 - reg-names: Must contain the following entries:
17 - "hcd"
18 - "fpci"
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra20-pcie.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
15 registers. Must contain an entry for each entry in the reg-names property.
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-suppl
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H A Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-suppl
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H A Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
34 /delete-node/ memory@80000000;
40 vdd-supply = <&vdd_3v3_hdmi>;
41 pll-supply = <&vdd_hdmi_pll>;
42 hdmi-supply = <&vdd_5v0_hdmi>;
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H A Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS
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H A Dtegra124-venice2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
31 hdmi-supply = <&vdd_5v0_hdmi>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio =
41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>;
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-binding
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H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio =
42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>;
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H A Dtegra210-p2597.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
23 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
33 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
35 hdmi-supply = <&vdd_hdmi>;
37 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
38 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
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/freebsd/sys/arm/nvidia/
H A Dtegra_pcie.c1 /*-
29 * Nvidia Integrated PCI/PCI-Express controller driver.
233 #define PADS_WR4(_sc, _r, _v) bus_write_4((_sc)->pads_mem_res, (_r), (_v))
234 #define PADS_RD4(_sc, _r) bus_read_4((_sc)->pads_mem_res, (_r))
235 #define AFI_WR4(_sc, _r, _v) bus_write_4((_sc)->afi_mem_res, (_r), (_v))
236 #define AFI_RD4(_sc, _r) bus_read_4((_sc)->afi_mem_res, (_r))
266 "avddio-pex-supply",
267 "dvddio-pex-supply",
268 "avdd-pex-pll-supply",
269 "hvdd-pex-supply",
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H A Dtegra_xhci.c1 /*-
211 #define IPFS_WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res_ipfs, (_r), (_v))
212 #define IPFS_RD4(_sc, _r) bus_read_4((_sc)->mem_res_ipfs, (_r))
213 #define FPCI_WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res_fpci, (_r), (_v))
214 #define FPCI_RD4(_sc, _r) bus_read_4((_sc)->mem_res_fpci, (_r))
216 #define LOCK(_sc) mtx_lock(&(_sc)->mtx)
217 #define UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
219 mtx_sleep(sc, &sc->mtx, 0, "tegra_xhci", timeout);
221 mtx_init(&_sc->mtx, device_get_nameunit(_sc->dev), "tegra_xhci", MTX_DEF)
222 #define LOCK_DESTROY(_sc) mtx_destroy(&_sc->mtx)
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