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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
34 clock-output-names:
[all …]
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix-anx6345.c1 /* SPDX-License-Identifier: GPL-2.0-only */
31 #include "analogix-i2c-dptx.h"
32 #include "analogix-i2c-txcommon.h"
47 struct drm_dp_aux aux; member
88 static ssize_t anx6345_aux_transfer(struct drm_dp_aux *aux, in anx6345_aux_transfer() argument
91 struct anx6345 *anx6345 = container_of(aux, struct anx6345, aux); in anx6345_aux_transfer()
93 return anx_dp_aux_transfer(anx6345->map[I2C_IDX_DPTX], msg); in anx6345_aux_transfer()
102 err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], in anx6345_dp_link_training()
108 err = drm_dp_dpcd_readb(&anx6345->aux, DP_MAX_LINK_RATE, &dp_bw); in anx6345_dp_link_training()
119 return -EINVAL; in anx6345_dp_link_training()
[all …]
H A Danalogix-anx78xx.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "analogix-anx78xx.h"
67 struct drm_dp_aux aux; member
108 static ssize_t anx78xx_aux_transfer(struct drm_dp_aux *aux, in anx78xx_aux_transfer() argument
111 struct anx78xx *anx78xx = container_of(aux, struct anx78xx, aux); in anx78xx_aux_transfer()
112 return anx_dp_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg); in anx78xx_aux_transfer()
119 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_set_hpd()
124 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_set_hpd()
136 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_clear_hpd()
141 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_clear_hpd()
[all …]
/linux/sound/soc/codecs/
H A Dmt6358.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6358.c -- mt6358 ALSA SoC audio codec driver
107 priv->mtkaif_protocol = mtkaif_protocol; in mt6358_set_mtkaif_protocol()
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
[all …]
H A Dwm8900.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8900.c -- WM8900 ALSA Soc Audio driver
10 * - Tristating.
11 * - TDM.
12 * - Jack detect.
13 * - FLL source configuration, currently only MCLK is supported.
141 u32 fll_out; /* FLL output frequency */
224 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wm8900_hp_event()
245 /* Enable the output stage */ in wm8900_hp_event()
258 /* Short the output */ in wm8900_hp_event()
[all …]
H A Dmt6359.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6359.c -- mt6359 ALSA SoC audio codec driver
24 regmap_update_bits(priv->regmap, MT6359_SMT_CON1, 0x3ff0, 0x3ff0); in mt6359_set_gpio_smt()
30 regmap_update_bits(priv->regmap, MT6359_DRV_CON2, 0xffff, 0x8888); in mt6359_set_gpio_driving()
31 regmap_update_bits(priv->regmap, MT6359_DRV_CON3, 0xffff, 0x8888); in mt6359_set_gpio_driving()
32 regmap_update_bits(priv->regmap, MT6359_DRV_CON4, 0x00ff, 0x88); in mt6359_set_gpio_driving()
38 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
42 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
43 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
[all …]
H A Dcs42l73.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs42l73.c -- CS42L73 ALSA Soc Audio driver
25 #include <sound/soc-dapm.h>
47 { 6, 0xF1 }, /* r06 - Power Ctl 1 */
48 { 7, 0xDF }, /* r07 - Power Ctl 2 */
49 { 8, 0x3F }, /* r08 - Power Ctl 3 */
50 { 9, 0x50 }, /* r09 - Charge Pump Freq */
51 { 10, 0x53 }, /* r0A - Output Load MicBias Short Detect */
52 { 11, 0x00 }, /* r0B - DMIC Master Clock Ctl */
53 { 12, 0x00 }, /* r0C - Aux PCM Ctl */
[all …]
H A Dmt6357.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
19 regmap_write(priv->regmap, MT6357_GPIO_MODE2_CLR, MT6357_GPIO_MODE2_CLEAR_ALL); in set_playback_gpio()
22 regmap_write(priv->regmap, MT6357_GPIO_MODE2_SET, in set_playback_gpio()
32 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_playback_gpio()
46 regmap_write(priv->regmap, MT6357_GPIO_MODE3_CLR, MT6357_GPIO_MODE3_CLEAR_ALL); in set_capture_gpio()
49 regmap_write(priv->regmap, MT6357_GPIO_MODE3_SET, in set_capture_gpio()
58 * will also have 26m, so will have power leak in set_capture_gpio()
61 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_capture_gpio()
77 /* Enable/Reduce HPL/R main output stage step by step */ in hp_main_output_ramp()
[all …]
H A Dwm8940.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8940.c -- WM8940 ALSA Soc Audio driver
16 * Fast VMID discharge for power down
106 { 0x1, 0x0000 }, /* Power 1 */
107 { 0x2, 0x0000 }, /* Power 2 */
108 { 0x3, 0x0000 }, /* Power 3 */
147 { 0x31, 0x0002 }, /* Output Control */
155 static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
173 static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
174 static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
[all …]
H A Dda9055.c1 // SPDX-License-Identifier: GPL-2.0-or-later
58 /* Input - Gain, Select and Filter Registers */
71 /* Output - Gain, Select and Filter Registers */
288 0x0, 0x10, TLV_DB_SCALE_ITEM(-5400, 0, 0),
289 /* -54dB to 15dB */
290 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
295 /* -78dB to 12dB */
296 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
305 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
306 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
[all …]
H A Dwm9713.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm9713.c -- ALSA Soc WM9713 codec support
5 * Copyright 2006-10 Wolfson Microelectronics PLC.
8 * Features:-
10 * o Support for AC97 Codec, Voice DAC and Aux DAC
92 static const DECLARE_TLV_DB_SCALE(out_tlv, -4650, 150, 0);
93 static const DECLARE_TLV_DB_SCALE(main_tlv, -3450, 150, 0);
94 static const DECLARE_TLV_DB_SCALE(misc_tlv, -1500, 300, 0);
164 SOC_SINGLE_TLV("Headphone Mixer Aux Playback Volume", AC97_REC_SEL, 12, 7, 1,
169 SOC_SINGLE_TLV("Speaker Mixer Aux Playback Volume", AC97_REC_SEL, 8, 7, 1,
[all …]
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra SOR Output Encoder
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
[all …]
/linux/drivers/gpu/drm/tegra/
H A Dsor.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
408 struct tegra_output output; member
427 struct drm_dp_aux *aux; member
481 static inline struct tegra_sor *to_sor(struct tegra_output *output) in to_sor() argument
483 return container_of(output, struct tegra_sor, output); in to_sor()
488 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl()
490 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl()
498 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel()
499 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel()
[all …]
H A Ddpaux.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/pinctrl/pinconf-generic.h>
40 struct drm_dp_aux aux; member
48 struct tegra_output *output; member
66 static inline struct tegra_dpaux *to_dpaux(struct drm_dp_aux *aux) in to_dpaux() argument
68 return container_of(aux, struct tegra_dpaux, aux); in to_dpaux()
79 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
81 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl()
89 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel()
90 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
28 powerdown-gpios:
32 reset-gpios:
36 vdd12-supply:
37 description: Regulator for 1.2V digital core power.
39 vdd33-supply:
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,kpss-acc-v1.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v1
10 - Christian Marangi <ansuelsmth@gmail.com>
13 The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.
17 clock-controller for enabling the cpu and handling the aux clocks.
21 const: qcom,kpss-acc-v1
25 - description: Base address and size of the register region
[all …]
/linux/sound/mips/
H A Dad1843.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2003 Vivien Chappelier <vivien.chappelier@linux-mips.org>
35 ad1843_PDNO = { 0, 14, 1 }, /* Converter Power-Down Flag */
47 ad1843_RX1M = { 4, 0, 5 }, /* Right Aux 1 Mix Gain/Atten */
48 ad1843_RX1MM = { 4, 7, 1 }, /* Right Aux 1 Mix Mute */
49 ad1843_LX1M = { 4, 8, 5 }, /* Left Aux 1 Mix Gain/Atten */
50 ad1843_LX1MM = { 4, 15, 1 }, /* Left Aux 1 Mix Mute */
51 ad1843_RX2M = { 5, 0, 5 }, /* Right Aux 2 Mix Gain/Atten */
52 ad1843_RX2MM = { 5, 7, 1 }, /* Right Aux 2 Mix Mute */
53 ad1843_LX2M = { 5, 8, 5 }, /* Left Aux 2 Mix Gain/Atten */
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
19 - items:
[all …]
/linux/tools/perf/Documentation/
H A Dperf-record.txt1 perf-record(1)
5 ----
6 perf-record - Run a command and record its profile into perf.data
9 --------
11 'perf record' [-e <EVENT> | --event=EVENT] [-a] <command>
12 'perf record' [-e <EVENT> | --event=EVENT] [-a] \-- <command> [<options>]
15 -----------
17 from it, into perf.data - without displaying anything.
23 -------
27 -e::
[all …]
H A Ditrace.txt8 p synthesize power events (incl. PSB events for Intel PT)
10 of aux-output (refer to perf record)
27 Z prefer to ignore timestamps (so-called "timeless" decoding)
30 The default is all events i.e. the same as --itrace=iybxwpe,
31 except for perf script where it is --itrace=ce
50 large PEBS. Refer linkperf:perf-inte
[all...]
/linux/sound/pci/oxygen/
H A Dxonar_dg.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * ------------
18 * SPI 0 -> CS4245
21 * I²S 1 -> CS4245
22 * I²S 2 -> CS4361 (center/LFE)
23 * I²S 3 -> CS4361 (surround)
24 * I²S 4 -> CS4361 (front)
26 * I²S ADC 1 <- CS4245
28 * GPIO 3 <- ?
29 * GPIO 4 <- headphone detect
[all …]
/linux/tools/perf/util/
H A Dauxtrace.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * auxtrace.h: AUX area trace support
4 * Copyright (c) 2013-2015, Intel Corporation.
60 #define AUXTRACE_ERR_FLG_OVERFLOW (1 << ('o' - 'a'))
61 #define AUXTRACE_ERR_FLG_DATA_LOST (1 << ('l' - 'a'))
63 #define AUXTRACE_LOG_FLG_ALL_PERF_EVTS (1 << ('a' - 'a'))
64 #define AUXTRACE_LOG_FLG_ON_ERROR (1 << ('e' - '
[all...]
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sc7180-qmp-usb3-dp-phy
20 - qcom,sc7280-qmp-usb3-dp-phy
21 - qcom,sc8180x-qmp-usb3-dp-phy
22 - qcom,sc8280xp-qmp-usb43dp-phy
[all …]
/linux/drivers/gpu/drm/bridge/
H A Dparade-ps8640.c1 // SPDX-License-Identifier: GPL-2.0-only
100 struct drm_dp_aux aux; member
153 static inline struct ps8640 *aux_to_ps8640(struct drm_dp_aux *aux) in aux_to_ps8640() argument
155 return container_of(aux, struct ps8640, aux); in aux_to_ps8640()
160 struct regmap *map = ps_bridge->regmap[PAGE2_TOP_CNTL]; in _ps8640_wait_hpd_asserted()
181 if (!ret && ps_bridge->need_post_hpd_delay) { in _ps8640_wait_hpd_asserted()
182 ps_bridge->need_post_hpd_delay = false; in _ps8640_wait_hpd_asserted()
189 static int ps8640_wait_hpd_asserted(struct drm_dp_aux *aux, unsigned long wait_us) in ps8640_wait_hpd_asserted() argument
191 struct ps8640 *ps_bridge = aux_to_ps8640(aux); in ps8640_wait_hpd_asserted()
192 struct device *dev = &ps_bridge->page[PAGE0_DP_CNTL]->dev; in ps8640_wait_hpd_asserted()
[all …]
/linux/drivers/gpu/drm/sti/
H A Dsti_tvout.c1 // SPDX-License-Identifier: GPL-2.0
106 /* enum listing the supported output data format */
131 #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
147 return readl(tvout->regs + offset); in tvout_read()
152 writel(val, tvout->regs + offset); in tvout_write()
156 * tvout_vip_set_color_order - Set the clipping mode of a VIP
180 * tvout_vip_set_clip_mode - Set the clipping mode of a VIP
196 * tvout_vip_set_rnd - Set the rounded value of a VIP
212 * tvout_vip_set_sel_input - Select the VIP input
217 * @video_out: selected_input (main/aux + conv)
[all …]

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