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/linux/Documentation/devicetree/bindings/hwmon/
H A Dadi,ltc4282.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sa <nuno.sa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
20 - adi,ltc4282
25 vdd-supply: true
30 '#clock-cells':
33 adi,rsense-nano-ohms:
36 adi,vin-mode-microvolt:
[all …]
/linux/drivers/net/ethernet/apple/
H A Dmace.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * mace.h - definitions for the registers in the Am79C940 MACE
16 REG(xmtrc); /* transmit retry count */
47 #define DRTRY 0x80 /* don't retry transmission after collision */
49 #define AUTO_PAD_XMIT 0x01 /* auto-pad short packets on transmission */
53 #define UFLO 0x40 /* underflow - xmit fifo ran dry */
56 #define ONE 0x08 /* 1 retry needed to xmit frame */
63 #define RETRY_MASK 0x0f /* number of retries (0 - 15) */
68 #define AUTO_STRIP_RCV 0x01 /* auto-strip short LLC frames on recv */
94 #define JABBER 0x80 /* jabber error - 10baseT xmission too long */
[all …]
/linux/drivers/net/ethernet/sun/
H A Dsunqe.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #define GLOB_MSIZE 0x0cUL /* Local-memory Size */
45 /* The following registers are for per-qe channel information/status. */
59 #define CREG_PIPG 0x34UL /* Inter-Frame Gap */
74 #define CREG_STAT_CCOFLOW 0x00100000 /* TX Coll-counter Overflow */
79 #define CREG_STAT_RCCOFLOW 0x00001000 /* RX Coll-counter Overflow */
85 #define CREG_STAT_CECOFLOW 0x00000040 /* CRC Error-counter Overflow*/
115 #define CREG_MMASK_ERETRY 0x04000000 /* Excess retry */
121 #define CREG_MMASK_RXCOLL 0x00000400 /* RX Coll-Cntr overflow */
129 /* Per-channel AMD 79C940 MACE registers. */
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbtc8192e2ant.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * The following is for 8192E 2Ant BT Co-exist definition
94 u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
95 u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
H A Dhalbtc8821a1ant.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * The following is for 8821A 1ANT BT Co-exist definition
93 /* Auto Rate Fallback Retry cnt */
95 /* Auto Rate Fallback Retry cnt */
/linux/drivers/staging/rtl8723bs/hal/
H A DHalBtc8723b1Ant.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
7 /* The following is for 8723B 1ANT BT Co-exist definition */
97 u32 backupArfrCnt1; /* Auto Rate Fallback Retry cnt */
98 u32 backupArfrCnt2; /* Auto Rate Fallback Retry cnt */
/linux/drivers/net/usb/
H A Dmcs7830.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
11 * Copyright (c) 2002-2003 TiVo Inc.
15 * 2010-12-19: add 7832 USB PID ("functionality same as MCS7830"),
19 * - support HIF_REG_CONFIG_SLEEPMODE/HIF_REG_CONFIG_TXENABLE (via autopm?)
20 * - implement ethtool_ops get_pauseparam/set_pauseparam
22 * - implement get_eeprom/[set_eeprom]
23 * - switch PHY on/off on ifup/ifdown (perhaps in usbnet.c, via MII)
24 * - mcs7830_get_regs() handling is weird: for rev 2 we return 32 regs,
26 * - anything else?
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/linux/drivers/scsi/
H A Dsense_codes.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * http://www.t10.org/lists/asc-num.txt [most recent: 20200817]
9 SENSE_CODE(0x0002, "End-of-partition/medium detected")
11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected")
12 SENSE_CODE(0x0005, "End-of-data detected")
51 SENSE_CODE(0x0409, "Logical unit not ready, self-test in progress")
87 SENSE_CODE(0x0801, "Logical unit communication time-out")
89 SENSE_CODE(0x0803, "Logical unit communication CRC error (Ultra-DMA/32)")
102 SENSE_CODE(0x0B01, "Warning - specified temperature exceeded")
103 SENSE_CODE(0x0B02, "Warning - enclosure degraded")
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_drv.c60 * - 3.0.0 - initial driver
61 * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
62 * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
64 * - 3.3.0 - Add VM support for UVD on supported hardware.
65 * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
66 * - 3.5.0 - Add support for new UVD_NO_OP register.
67 * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
68 * - 3.7.0 - Add support for VCE clock list packet
69 * - 3.8.0 - Add support raster config init in the kernel
70 * - 3.9.0 - Add support for memory query info about VRAM and GTT.
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/linux/drivers/net/ethernet/intel/e1000e/
H A D82571.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
14 #define AN_RETRY_COUNT 5 /* Autoneg Retry Count value */
16 /* Intr Throttling - RW */
19 #define E1000_EIAC_82574 0x000DC /* Ext. Interrupt Auto Clear - RW */
/linux/drivers/media/dvb-frontends/
H A Dor51132.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
15 * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
19 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
20 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
63 struct i2c_msg msg = { .addr = state->config->demod_address, in or51132_writebuf()
67 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { in or51132_writebuf()
70 return -EREMOTEIO; in or51132_writebuf()
86 struct i2c_msg msg = { .addr = state->config->demod_address, in or51132_readbuf()
90 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { in or51132_readbuf()
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/linux/drivers/net/ethernet/amd/
H A Dariadne.h4 * © Copyright 1995 by Geert Uytterhoeven (geert@linux-m68k.org)
8 * ----------------------------------------------------------------------------------
13 * Written 1993-94 by Donald Becker.
15 * Am79C960: PCnet(tm)-ISA Single-Chip Ethernet Controller
22 * ----------------------------------------------------------------------------------
28 * ----------------------------------------------------------------------------------
30 * The Ariadne is a Zorro-II board made by Village Tronic. It contains:
32 * - an Am79C960 PCnet-ISA Single-Chip Ethernet Controller with both
33 * 10BASE-2 (thin coax) and 10BASE-T (UTP) connectors
35 * - an MC68230 Parallel Interface/Timer configured as 2 parallel ports
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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2400pci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
25 * Default offset is required for RSSI <-> dBm conversion.
153 * CSR11: Back-off control register.
154 * CWMIN: CWmin. Default cwmin is 31 (2^5 - 1).
155 * CWMAX: CWmax. Default cwmax is 1023 (2^10 - 1).
157 * LONG_RETRY: Long retry count.
158 * SHORT_RETRY: Short retry count.
189 * TSF_COUNT: Enable tsf auto counting.
190 * TSF_SYNC: Tsf sync, 0: disable, 1: infra, 2: ad-hoc/master mode.
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H A Drt2500pci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
36 * Default offset is required for RSSI <-> dBm conversion.
218 * KICK_DECRYPT: Kick decryption engine, self-clear.
228 * CSR11: Back-off control register.
229 * CWMIN: CWmin. Default cwmin is 31 (2^5 - 1).
230 * CWMAX: CWmax. Default cwmax is 1023 (2^10 - 1).
233 * LONG_RETRY: Long retry count.
234 * SHORT_RETRY: Short retry count.
266 * TSF_COUNT: Enable tsf auto counting.
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/linux/include/scsi/fc/
H A Dfc_fcp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Maintained at www.Open-FCoE.org
15 * From T10 FCP-3, T10 project 1560-D Rev 4, Sept. 13, 2005.
25 #define FCP_SPPF_TASK_RETRY_ID 0x0200 /* task retry ID requested */
26 #define FCP_SPPF_RETRY 0x0100 /* retry supported */
68 #define FCP_PTA_ACA 4 /* auto. contingent allegiance */
74 * fc_tm_flags - task management flags field.
78 deprecated as of FCP-3 */
93 * FCP_TXRDY IU - transfer ready payload.
104 * FCP_RESP IU - response payload.
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/linux/drivers/rtc/
H A Drtc-s5m.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
27 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
49 * specific fields in UDR register. These fields usually are auto-cleared
76 * auto-cleared after successful update.
79 /* Auto-cleared mask in UDR field for writing time and alarm */
147 * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits
191 tm->tm_sec = data[RTC_SEC] & 0x7f; in s5m8767_data_to_tm()
192 tm->tm_min = data[RTC_MIN] & 0x7f; in s5m8767_data_to_tm()
194 tm->tm_hour = data[RTC_HOUR] & 0x1f; in s5m8767_data_to_tm()
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/linux/include/uapi/linux/
H A Dwireless.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7 * Authors : Jean Tourrilhes - HPL - <jt@hpl.hp.com>
8 * Copyright (c) 1997-2007 Jean Tourrilhes, All Rights Reserved.
16 * Initial APIs (1996 -> onward) :
17 * -----------------------------
44 * New driver API (2002 -> onward) :
45 * -------------------------------
53 * Wireless Events (2002 -> onward) :
54 * --------------------------------
59 * --------------
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/linux/drivers/net/wireless/ath/ath11k/
H A Ddebugfs_sta.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
20 struct rate_info *txrate = &arsta->txrate; in ath11k_debugfs_sta_add_tx_stats()
24 if (!arsta->tx_stats) in ath11k_debugfs_sta_add_tx_stats()
27 tx_stats = arsta->tx_stats; in ath11k_debugfs_sta_add_tx_stats()
28 gi = FIELD_GET(RATE_INFO_FLAGS_SHORT_GI, arsta->txrate.flags); in ath11k_debugfs_sta_add_tx_stats()
29 mcs = txrate->mcs; in ath11k_debugfs_sta_add_tx_stats()
30 bw = ath11k_mac_mac80211_bw_to_ath11k_bw(txrate->bw); in ath11k_debugfs_sta_add_tx_stats()
31 nss = txrate->nss - 1; in ath11k_debugfs_sta_add_tx_stats()
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/linux/drivers/fsi/
H A Dfsi-master.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * FSI master definitions. These comprise the core <--> master interface,
4 * to allow the core to interact with the (hardware-specific) masters.
68 #define FSI_MECTRL_P8_AUTO_TERM 0x4000 /* Auto terminate */
77 * These are used by low level masters that bit-bang out the protocol
88 #define FSI_MASTER_EPOLL_CLOCKS 50 /* Number of clocks for E_POLL retry */
90 /* Various retry maximums */
101 #define FSI_CMD_SAME_AR 0x3 /* but only a 2-bit opcode... */
112 /* fsi-master definition and flags */
144 * ->dev in particular. The registration path performs a get_device(), which
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/linux/drivers/net/ethernet/intel/igc/
H A Digc_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
90 /* Loop limit on how long we wait for auto-negotiation to complete */
172 /* 1000BASE-T Control Register */
176 /* 1000BASE-T Status Register */
185 /* Number of milliseconds for NVM auto read done after MAC reset. */
187 #define IGC_EECD_AUTO_RD 0x00000200 /* NVM Auto Read done */
239 /* 1Gbps and 2.5Gbps half duplex is not supported, nor spec-compliant. */
288 #define IGC_QVECTOR_MASK 0x7FFC /* Q-vector mask */
311 #define IGC_TXD_POPTS_SMD_MASK 0x3000 /* Indicates whether it's SMD-V or SMD-R */
336 #define IGC_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
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/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_port_common.c1 // SPDX-License-Identifier: GPL-2.0-only
23 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); in efx_mcdi_get_phy_cfg()
31 rc = -EIO; in efx_mcdi_get_phy_cfg()
35 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); in efx_mcdi_get_phy_cfg()
36 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg()
37 cfg->supported_cap = in efx_mcdi_get_phy_cfg()
39 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); in efx_mcdi_get_phy_cfg()
40 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); in efx_mcdi_get_phy_cfg()
41 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); in efx_mcdi_get_phy_cfg()
42 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), in efx_mcdi_get_phy_cfg()
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_port_common.c1 // SPDX-License-Identifier: GPL-2.0-only
22 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); in efx_mcdi_get_phy_cfg()
30 rc = -EIO; in efx_mcdi_get_phy_cfg()
34 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); in efx_mcdi_get_phy_cfg()
35 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg()
36 cfg->supported_cap = in efx_mcdi_get_phy_cfg()
38 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); in efx_mcdi_get_phy_cfg()
39 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); in efx_mcdi_get_phy_cfg()
40 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); in efx_mcdi_get_phy_cfg()
41 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), in efx_mcdi_get_phy_cfg()
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/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_display.c55 nvif_event_allow(&nv_crtc->vblank); in nouveau_display_vblank_enable()
66 nvif_event_block(&nv_crtc->vblank); in nouveau_display_vblank_disable()
74 line -= total; in calc()
77 line -= total; in calc()
78 line -= blanke + 1; in calc()
88 struct nvif_head *head = &nouveau_crtc(crtc)->head; in nouveau_display_scanoutpos_head()
90 int retry = 20; in nouveau_display_scanoutpos_head() local
96 ret = nvif_mthd(&head->object, NVIF_HEAD_V0_SCANOUTPOS, &args, sizeof(args)); in nouveau_display_scanoutpos_head()
105 if (retry) ndelay(vblank->linedur_ns); in nouveau_display_scanoutpos_head()
106 } while (retry--); in nouveau_display_scanoutpos_head()
[all …]
/linux/drivers/media/i2c/
H A Dtvp514x.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * Karicheri Muralidharan <m-karicheri2@ti.com>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/media-entity.h>
31 #include <media/v4l2-async.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-ctrls.h>
34 #include <media/v4l2-device.h>
35 #include <media/v4l2-fwnode.h>
36 #include <media/v4l2-mediabus.h>
[all …]
/linux/drivers/scsi/mvsas/
H A Dmv_64xx.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
16 void __iomem *regs = mvi->regs; in mvs_64xx_detect_porttype()
18 struct mvs_phy *phy = &mvi->phy[i]; in mvs_64xx_detect_porttype()
21 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); in mvs_64xx_detect_porttype()
23 phy->phy_type |= PORT_TYPE_SAS; in mvs_64xx_detect_porttype()
25 phy->phy_type |= PORT_TYPE_SATA; in mvs_64xx_detect_porttype()
30 void __iomem *regs = mvi->regs; in mvs_64xx_enable_xmt()
34 if (mvi->chip->n_phy <= MVS_SOC_PORTS) in mvs_64xx_enable_xmt()
43 void __iomem *regs = mvi->regs; in mvs_64xx_phy_hacks()
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