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/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
31 static inline void __iomem *hdmi_av_base(struct hdmi_core_data *core) in hdmi_av_base() argument
33 return core->base + HDMI_CORE_AV; in hdmi_av_base()
36 static int hdmi_core_ddc_init(struct hdmi_core_data *core) in hdmi_core_ddc_init() argument
38 void __iomem *base = core->base; in hdmi_core_ddc_init()
51 return -ETIMEDOUT; in hdmi_core_ddc_init()
62 return -ETIMEDOUT; in hdmi_core_ddc_init()
72 return -ETIMEDOUT; in hdmi_core_ddc_init()
78 static int hdmi_core_ddc_edid(struct hdmi_core_data *core, in hdmi_core_ddc_edid() argument
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/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
30 static inline void __iomem *hdmi_av_base(struct hdmi_core_data *core) in hdmi_av_base() argument
32 return core->base + HDMI_CORE_AV; in hdmi_av_base()
35 int hdmi4_core_ddc_init(struct hdmi_core_data *core) in hdmi4_core_ddc_init() argument
37 void __iomem *base = core->base; in hdmi4_core_ddc_init()
50 return -ETIMEDOUT; in hdmi4_core_ddc_init()
61 return -ETIMEDOUT; in hdmi4_core_ddc_init()
71 return -ETIMEDOUT; in hdmi4_core_ddc_init()
79 struct hdmi_core_data *core = data; in hdmi4_core_ddc_read() local
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/linux/sound/hda/core/
H A Dstream.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio stream operations
11 #include <sound/core.h>
26 * +--+-------+
28 * +--+----+--+
32 * +--+----+--+
34 * +--+----+--+
39 * +--+----+--+
41 * +--+----+--+
45 * +--+----+--+
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H A Dcontroller.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio controller helpers
9 #include <sound/core.h>
19 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
25 dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n", in azx_clear_corbrp()
29 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
35 dev_err(bus->dev, "CORB reset timeout#2, CORBRP = %d\n", in azx_clear_corbrp()
40 * snd_hdac_bus_init_cmd_io - set up CORB/RIRB buffers
41 * @bus: HD-audio core bus
45 WARN_ON_ONCE(!bus->rb.area); in snd_hdac_bus_init_cmd_io()
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H A Di915.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * hdac_i915.c - routines for sync between HD-A core and i915 display driver
9 #include <sound/core.h>
15 static int gpu_bind = -1;
18 "(1=always, 0=never, -1=on nomodeset(default))");
21 * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
22 * @bus: HDA core bus
26 * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
36 struct drm_audio_component *acomp = bus->audio_component; in snd_hdac_i915_set_bclk()
37 struct pci_dev *pci = to_pci_dev(bus->dev); in snd_hdac_i915_set_bclk()
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H A Dbus.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio core bus driver
24 * snd_hdac_bus_init - initialize a HD-audio bas bus
35 bus->dev = dev; in snd_hdac_bus_init()
37 bus->ops = ops; in snd_hdac_bus_init()
39 bus->ops = &default_ops; in snd_hdac_bus_init()
40 bus->dma_type = SNDRV_DMA_TYPE_DEV; in snd_hdac_bus_init()
41 INIT_LIST_HEAD(&bus->stream_list); in snd_hdac_bus_init()
42 INIT_LIST_HEAD(&bus->codec_list); in snd_hdac_bus_init()
43 INIT_WORK(&bus->unsol_work, snd_hdac_bus_process_unsol_events); in snd_hdac_bus_init()
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/linux/sound/hda/core/ext/
H A Dstream.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * hdac-ext-stream.c - HD-audio extended stream operations.
22 * snd_hdac_ext_host_stream_setup - Setup a HOST stream.
24 * @code_loading: Whether the stream is for PCM or code-loading.
30 return hext_stream->host_setup(hdac_stream(hext_stream), code_loading); in snd_hdac_ext_host_stream_setup()
35 * snd_hdac_apl_host_stream_setup - Setup a HOST stream following procedure
38 * @code_loading: Whether the stream is for PCM or code-loading.
47 snd_hdac_ext_stream_decouple(hstream->bus, hext_stream, false); in snd_hdac_apl_host_stream_setup()
49 snd_hdac_ext_stream_decouple(hstream->bus, hext_stream, true); in snd_hdac_apl_host_stream_setup()
55 * snd_hdac_ext_stream_init - initialize each stream (aka device)
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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,audiocc-sm8250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPASS Audio Clock Controller on SM8250 SoCs
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
15 See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
16 of Audio Clock controller clock IDs.
20 const: qcom,sm8250-lpass-audiocc
25 '#clock-cells':
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H A Dqcom,aoncc-sm8250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
15 See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
16 of Audio Clock controller clock IDs.
20 const: qcom,sm8250-lpass-aoncc
25 '#clock-cells':
30 - description: LPASS Core voting clock
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,apr-services.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,apr-services.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
22 3 = DSP Core Service
23 4 = Audio Front End Service.
26 7 = Audio Stream Manager Service.
27 8 = Audio Device Manager Service.
29 10 = Core voice stream.
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/linux/Documentation/devicetree/bindings/dsp/
H A Dmediatek,mt8195-dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek mt8195 DSP core
10 - YC Hung <yc.hung@mediatek.com>
13 Some boards from mt8195 contain a DSP core used for
14 advanced pre- and post- audio processing.
18 const: mediatek,mt8195-dsp
22 - description: Address and size of the DSP Cfg registers
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/linux/arch/parisc/kernel/
H A Dhardware.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Based on the document "PA-RISC 1.1 I/O Firmware Architecture
73 {HPHW_NPROC,0x312,0x4,0x81,"Strider-50 (715S/50)"},
74 {HPHW_NPROC,0x313,0x4,0x81,"Strider-33 (715S/33)"},
75 {HPHW_NPROC,0x314,0x4,0x81,"Trailways-50 (715T/50)"},
76 {HPHW_NPROC,0x315,0x4,0x81,"Trailways-33 (715T/33)"},
87 {HPHW_NPROC,0x482,0x4,0x81,"WB-80 (E35)"},
88 {HPHW_NPROC,0x483,0x4,0x81,"WB-96 (E45)"},
89 {HPHW_NPROC,0x484,0x4,0x81,"UL Proc L-100 (811/D210,D310)"},
90 {HPHW_NPROC,0x485,0x4,0x81,"UL Proc L-75 (801/D200)"},
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/linux/drivers/media/pci/cx88/
H A Dcx88-alsa.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for audio capture
14 #include "cx88-reg.h"
22 #include <linux/dma-mapping.h>
26 #include <sound/core.h>
37 chip->core->name, ##arg); \
41 * Data type declarations - Can be moded to a header file later
54 struct cx88_core *core; member
60 /* audio controls */
81 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
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H A Dcx88-dsp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "cx88-reg.h"
27 * based on the sampling rate of the audio rds fifo.
38 * for the input of the audio rds fifo, and measure it's sampling rate to
62 MODULE_PARM_DESC(dsp_debug, "enable audio dsp debug messages");
77 return -int_cos(x - INT_PI); in int_cos()
80 return -int_cos(INT_PI / 2 - (x % (INT_PI / 2))); in int_cos()
89 ret = 32768 - t2 + t4 - t6 + t8; in int_cos()
108 s32 s = x[i] + ((s64)coeff * s_prev / 32768) - s_prev2; in int_goertzel()
114 tmp = (s64)s_prev2 * s_prev2 + (s64)s_prev * s_prev - in int_goertzel()
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H A Dcx88-cards.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * card-specific stuff.
19 static unsigned int tuner[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
20 static unsigned int radio[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
21 static unsigned int card[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
41 printk(KERN_DEBUG pr_fmt("%s: core:" fmt), \
45 /* ------------------------------------------------------------------ */
223 .name = "MSI TV-@nywhere Master",
325 .name = "IODATA GV-VCP3/PCI",
367 .name = "ASUS PVR-416",
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/linux/sound/soc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # SoC audio configuration
7 tristate "ALSA for SoC audio support"
21 This ASoC audio support can also be built as a module. If so, the module
22 will be called snd-soc-core
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/linux/drivers/ps3/
H A Dps3av.c1 // SPDX-License-Identifier: GPL-2.0-only
156 if (hdr->cid & PS3AV_EVENT_CMD_MASK) { in ps3av_parse_event_packet()
157 table = ps3av_search_cmd_table(hdr->cid, PS3AV_EVENT_CMD_MASK); in ps3av_parse_event_packet()
159 dev_dbg(&ps3av->dev->core, in ps3av_parse_event_packet()
161 hdr->cid, ps3av_event_get_port_id(hdr->cid), in ps3av_parse_event_packet()
162 hdr->size); in ps3av_parse_event_packet()
166 __func__, hdr->cid, hdr->size); in ps3av_parse_event_packet()
179 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); in ps3av_vuart_write()
181 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__); in ps3av_vuart_write()
191 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); in ps3av_vuart_read()
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8250-lpass-lpi-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
18 const: qcom,sm8250-lpass-lpi-pinctrl
25 - description: LPASS Core voting clock
26 - description: LPASS Audio voting clock
28 clock-names:
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H A Dqcom,sc8280xp-lpass-lpi-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
18 const: qcom,sc8280xp-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
27 - description: LPASS Core voting clock
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Rohit kumar <quic_rohkumar@quicinc.com>
14 Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist
15 of MI2S interface for audio data transfer on external codecs. LPASS cpu driver
16 is a module to configure Low-Power Audio Interface(LPAIF) core registers
22 - qcom,lpass-cpu
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H A Dstarfive,jh7110-pwmdac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/starfive,jh7110-pwmdac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 PWM-DAC Controller
10 The PWM-DAC Controller uses PWM square wave generators plus RC filters to
11 form a DAC for audio play in StarFive JH7110 SoC. This audio play controller
12 supports 16 bit audio format, up to 48K sampling frequency, up to left and
16 - Hal Feng <hal.feng@starfivetech.com>
19 - $ref: dai-common.yaml#
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H A Datmel,sam9x5-wm8731-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/atmel,sam9x5-wm8731-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel at91sam9x5ek wm8731 audio complex
10 - Dharma Balasubiramani <dharma.b@microchip.com>
13 The audio complex configuration for Atmel at91sam9x5ek with WM8731 audio codec.
17 const: atmel,sam9x5-wm8731-audio
21 description: The user-visible name of this sound complex.
23 atmel,ssc-controller:
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H A Dti,tlv320aic3x.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 TLV320AIC3x are a series of low-power stereo audio codecs with stereo
13 single-ended or fully differential configurations.
15 The serial control bus supports SPI or I2C protocols, while the serial audio
16 data bus is programmable for I2S, left/right-justified, DSP, or TDM modes.
18 The following pins can be referred in the sound node's audio routing property:
44 - Jai Luthra <j-luthra@ti.com>
49 - ti,tlv320aic23
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H A Dti,tlv320aic32x4.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320AIC32x4 Stereo Audio codec
11 - Alexander Stein <alexander.stein@ew.tq-group.com>
14 The TLV320AIC32x4 audio codec can be accessed using I2C or SPI
19 - ti,tas2505
20 - ti,tlv320aic32x4
21 - ti,tlv320aic32x6
28 - description: Master clock
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/linux/sound/soc/fsl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 comment "Common SoC Audio options for Freescale CPUs:"
17 This option is only useful for out-of-tree drivers since
18 in-tree drivers select it automatically.
21 tristate "Synchronous Audio Interface (SAI) module support"
28 Say Y if you want to add Synchronous Audio Interfac
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