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/linux/Documentation/devicetree/bindings/sound/
H A Dfsl-asoc-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl-asoc-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Generic ASoC Sound Card with ASRC support
15 most of them have ASRC inside. And this is a specific feature that might
20 of the wide sample rates support through ASRC.
24 AC'97/I2S/PCM type sound cards, such as S/PDIF audio and HDMI audio, as
28 - Shengjiu Wang <shengjiu.wang@nxp.com>
33 - items:
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H A Dnvidia,tegra186-asrc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra186-asrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra186 ASRC
10 Asynchronous Sample Rate Converter (ASRC) converts the sampling frequency
13 ASRC has two modes of operation. One where ratio can be programmed in SW
21 - Jon Hunter <jonathanh@nvidia.com>
22 - Mohan Kumar <mkumard@nvidia.com>
23 - Sameer Pujar <spujar@nvidia.com>
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H A Dfsl,imx-asrc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,imx-asrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Asynchronous Sample Rate Converter (ASRC) Controller
10 The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of
13 with other Back Ends Audio controller such as ESAI, SSI and SAI. It has
17 - Shawn Guo <shawnguo@kernel.org>
18 - Sascha Hauer <s.hauer@pengutronix.de>
23 - enum:
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H A Dimx-audio-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/imx-audio-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX audio sound card.
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 - $ref: sound-card-common.yaml#
18 - fsl,imx-audio-card
21 ".*-dai-link$":
29 link-name:
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H A Dnvidia,tegra210-ahub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
11 for audio pre-processing, post-processing and a programmable full
12 crossbar for routing audio data across these accelerators. It has
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^ahub@[0-9a-f]*$"
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/linux/sound/soc/fsl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "SoC Audio for Freescale CPUs"
4 comment "Common SoC Audio options for Freescale CPUs:"
7 tristate "Asynchronous Sample Rate Converter (ASRC) module support"
15 Say Y if you want to add Asynchronous Sample Rate Converter (ASRC)
17 This option is only useful for out-of-tree drivers since
18 in-tree drivers select it automatically.
21 tristate "Synchronous Audio Interface (SAI) module support"
27 Say Y if you want to add Synchronous Audio Interface (SAI)
29 This option is only useful for out-of-tree drivers since
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 snd-soc-p1022-ds-y := p1022_ds.o
4 obj-$(CONFIG_SND_SOC_P1022_DS) += snd-soc-p102
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H A Dfsl_asrc.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale ASRC ALSA SoC Digital Audio Interface (DAI) driver
11 #include <linux/dma-mapping.h>
14 #include <linux/dma/imx-dma.h>
26 dev_err(&asrc->pdev->de
217 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_request_pair() local
260 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_release_pair() local
285 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_set_watermarks() local
326 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_set_ideal_ratio() local
381 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_config_pair() local
584 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_start_pair() local
618 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_stop_pair() local
634 struct fsl_asrc *asrc = pair->asrc; fsl_asrc_get_dma_channel() local
646 struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai); fsl_asrc_dai_startup() local
701 struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai); fsl_asrc_dai_hw_params() local
785 struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai); fsl_asrc_dai_probe() local
975 fsl_asrc_init(struct fsl_asrc * asrc) fsl_asrc_init() argument
1013 struct fsl_asrc *asrc = (struct fsl_asrc *)dev_id; fsl_asrc_isr() local
1073 struct fsl_asrc *asrc; fsl_asrc_probe() local
1264 struct fsl_asrc *asrc = dev_get_drvdata(dev); fsl_asrc_runtime_resume() local
1339 struct fsl_asrc *asrc = dev_get_drvdata(dev); fsl_asrc_runtime_suspend() local
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/linux/sound/soc/tegra/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
10 Say Y or M here if you want support for SoC audio on Tegra.
63 Config to enable Audio Hub (AHUB) module, which comprises of a
64 switch called Audio Crossbar (AXBAR) used to configure or modify
65 the audio routing path between various HW accelerators present in
83 Config to enable the Inter-IC Sound (I2S) Controller which
84 implements full-duplex and bidirectional and single direction
85 point-to-point serial interfaces. It can interface with I2S
99 tristate "Tegra186 ASRC module"
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 snd-soc-tegra-pcm-y := tegra_pcm.o
4 snd-soc-tegra-utils-y += tegra_asoc_utils.o
5 snd-soc-tegra20-ac97-y := tegra20_ac97.o
6 snd-soc-tegra20-das-y := tegra20_das.o
7 snd-soc-tegra20-i2s-y := tegra20_i2s.o
8 snd-soc-tegra20-spdif-y := tegra20_spdif.o
9 snd-soc-tegra30-ahub-y := tegra30_ahub.o
10 snd-soc-tegra30-i2s-y := tegra30_i2s.o
11 snd-soc-tegra210-ahub-y := tegra210_ahub.o
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn-bsh-smm-s2pro.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mn-bsh-smm-s2-common.dtsi"
10 #include <dt-bindings/sound/tlv320aic31xx.h>
14 compatible = "bsh,imx8mn-bsh-smm-s2pro", "fsl,imx8mn";
21 sound-tlv320aic31xx {
22 compatible = "fsl,imx-audio-tlv320aic31xx";
23 model = "tlv320aic31xx-hifi";
24 audio-cpu = <&sai3>;
25 audio-codec = <&tlv320dac3101>;
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H A Dimx8-ss-audio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-clock.h>
8 #include <dt-bindings/clock/imx8-lpcg.h>
9 #include <dt-bindings/dma/fsl-edma.h>
10 #include <dt-bindings/firmware/imx/rsrc.h>
12 audio_ipg_clk: clock-audio-ipg {
13 compatible = "fixed-clock";
14 #clock-cells = <0>;
15 clock-frequency = <120000000>;
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H A Dimx8mn-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/usb/pd.h>
11 stdout-path = &uart2;
14 gpio-leds {
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_led>;
22 default-state = "on";
26 hdmi-connector {
27 compatible = "hdmi-connector";
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H A Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
24 stdout-path = &lpuart0;
27 imx8dxl-cm4 {
28 compatible = "fsl,imx8qxp-cm4";
30 mbox-names = "tx", "rx", "rxdb";
32 memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
34 power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
35 fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx-sdb-mqs.dts1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dts"
12 sound-mqs {
13 compatible = "fsl,imx6sx-sdb-mqs",
14 "fsl,imx-audio-mqs";
15 model = "mqs-audio";
16 audio-cpu = <&sai1>;
17 audio-asrc = <&asrc>;
18 audio-codec = <&mqs>;
28 pinctrl-names = "default";
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H A Dimx6sx-sabreauto.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
11 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_led>;
23 led-user {
26 linux,default-trigger = "heartbeat";
30 vcc_sd3: regulator-vcc-sd3 {
31 compatible = "regulator-fixed";
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H A Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
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H A Dimx6qdl-sabreauto.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
11 stdout-path = &uart4;
20 compatible = "gpio-leds";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_leds>;
24 led-user {
30 gpio-keys {
31 compatible = "gpio-keys";
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/linux/sound/soc/mediatek/mt2701/
H A Dmt2701-afe-clock-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
3 * mt2701-afe-clock-ctrl.c -- Mediatek 2701 afe clock ctrl
10 #include "mt2701-afe-common.h"
11 #include "mt2701-afe-clock-ctrl.h"
27 struct mt2701_afe_private *afe_priv = afe->platform_priv; in mt2701_init_clock()
31 afe_priv->base_ck[i] = devm_clk_get(afe->dev, base_clks[i]); in mt2701_init_clock()
32 if (IS_ERR(afe_priv->base_ck[i])) { in mt2701_init_clock()
33 dev_err(afe->dev, "failed to get %s\n", base_clks[i]); in mt2701_init_clock()
34 return PTR_ERR(afe_priv->base_ck[i]); in mt2701_init_clock()
39 for (i = 0; i < afe_priv->soc->i2s_num; i++) { in mt2701_init_clock()
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/linux/sound/soc/codecs/
H A Drt5670.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5670.c -- RT5670 ALSA SoC audio codec driver
25 #include <sound/soc-dapm.h>
31 #include "rt5670-dsp.h"
50 MODULE_PARM_DESC(quirk, "Board-specific quirk override");
422 * rt5670_headset_detect - Detect headset.
423 * @component: SoC audio component device.
457 rt5670->jack_type = SND_JACK_HEADSET; in rt5670_headset_detect()
464 rt5670->jack_type = SND_JACK_HEADPHONE; in rt5670_headset_detect()
471 rt5670->jack_type = 0; in rt5670_headset_detect()
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H A Drt5651.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5651.c -- RT5651 ALSA SoC audio codec driver
23 #include <sound/soc-dapm.h>
287 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
288 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
289 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
290 static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
356 /* ASRC */
357 SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1,
359 SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1,
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H A Drt5682.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682.c -- RT5682 ALSA SoC audio component driver
25 #include <sound/soc-dapm.h>
38 "LDO1-IN",
60 ret = regmap_multi_reg_write(rt5682->regma in rt5682_apply_patch_list()
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H A Drt5668.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5668.c -- RT5668B ALSA SoC audio component driver
26 #include <sound/soc-dapm.h>
746 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0);
747 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
748 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
803 * rt5668_sel_asrc_clk_src - select ASRC clock source for a set of filters
804 * @component: SoC audio component device.
808 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5668 can
809 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
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H A Drt5677.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5677.c -- RT5677 ALSA SoC audio codec driver
29 #include <sound/soc-dapm.h>
35 #include "rt5677-spi.h"
552 * rt5677_dsp_mode_i2c_write_addr - Write value to address on DSP mode.
563 struct snd_soc_component *component = rt5677->component; in rt5677_dsp_mode_i2c_write_addr()
566 mutex_lock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_write_addr()
568 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, in rt5677_dsp_mode_i2c_write_addr()
571 dev_err(component->dev, "Failed to set addr msb value: %d\n", ret); in rt5677_dsp_mode_i2c_write_addr()
575 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, in rt5677_dsp_mode_i2c_write_addr()
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H A Drt5682s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682s.c -- RT5682I-VS ALSA SoC audio component driver
25 #include <sound/soc-dapm.h>
38 .dai_clk_names[RT5682S_DAI_WCLK_IDX] = "rt5682-dai-wclk",
39 .dai_clk_names[RT5682S_DAI_BCLK_IDX] = "rt5682-dai-bclk",
46 [RT5682S_SUPPLY_LDO1_IN] = "LDO1-IN",
69 ret = regmap_multi_reg_write(rt5682s->regmap, patch_list, ARRAY_SIZE(patch_list)); in rt5682s_apply_patch_list()
624 regmap_write(rt5682s->regmap, RT5682S_RESET, 0); in rt5682s_reset()
634 dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type); in rt5682s_button_detect()
651 mutex_lock(&rt5682s->sar_mutex); in rt5682s_sar_power_mode()
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