Searched full:aud_pll_div1_lpcg (Results 1 – 3 of 3) sorted by relevance
249 <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>,
38 <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>,
682 assigned-clock-parents = <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>;694 assigned-clock-parents = <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>;