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Searched full:aud_pll_div0_lpcg (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qm-ss-audio.dtsi20 <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,
50 <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,
243 <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,
H A Dimx8-ss-audio.dtsi129 <&aud_pll_div0_lpcg IMX_LPCG_CLK_4>,
457 <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,
597 aud_pll_div0_lpcg: clock-controller@59d20000 { label
660 <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,
H A Dimx8dxl-ss-adma.dtsi37 <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,
H A Dimx8qxp-mek.dts404 assigned-clock-parents = <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>;
H A Dimx8qm-mek.dts546 assigned-clock-parents = <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>;
H A Dimx8-apalis-v1.1.dtsi853 assigned-clock-parents = <&aud_pll_div0_lpcg 0>, <&aud_rec1_lpcg 0>;
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,imx8-acm.yaml248 <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,