Searched +full:ast2600 +full:- +full:uart +full:- +full:routing (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)5 ---6 $id: http://devicetree.org/schemas/soc/aspeed/uart-routing.yaml#7 $schema: http://devicetree.org/meta-schemas/core.yaml#9 title: Aspeed UART Routing Controller12 - Oskar Senft <osk@google.com>13 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>16 The Aspeed UART routing control allow to dynamically route the inputs for17 the built-in UARTS and physical serial I/O ports.19 This allows, for example, to connect the output of UART to another UART.[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#11 - Andrew Jeffery <andrew@aj.id.au>12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth21 The LPC controller is represented as a multi-function device to account for the27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART41 - enum:[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>6 #include <dt-bindings/clock/ast2600-clock.h>10 compatible = "aspeed,ast2600";11 #address-cells = <1>;12 #size-cells = <1>;13 interrupt-parent = <&gic>;47 #address-cells = <1>;48 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 /dts-v1/;5 #include "aspeed-g6.dtsi"6 #include <dt-bindings/gpio/aspeed-gpio.h>7 #include <dt-bindings/i2c/i2c.h>8 #include <dt-bindings/leds/leds-pca955x.h>12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";15 stdout-path = &uart5;24 reserved-memory {25 #address-cells = <1>;[all …]