Searched +full:ast2600 +full:- +full:lpc +full:- +full:v2 (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/mfd/aspeed-lp[all...]
2 Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller5 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth7 primary use case of the Aspeed LPC controller is as a slave on the bus11 The LPC controller is represented as a multi-function device to account for the16 * An LPC Host Controller: Manages LPC functions such as host vs slave mode, the17 physical properties of some LPC pins, configuration of serial IRQs, and18 APB-to-LPC bridging amonst other functions.20 * An LPC Host Interface Controller: Manages functions exposed to the host such21 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART28 Additionally the state of the LPC controller influences the pinmux[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kc[all...]
1 // SPDX-License-Identifier: GPL-2.0-or-later4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>6 #include <dt-bindings/clock/ast2600-clock.h>10 compatible = "aspeed,ast2600";11 #address-cells = <1>;12 #size-cells = <1>;13 interrupt-parent = <&gic>;47 #address-cells = <1>;48 #size-cells = <0>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)5 ---6 $id: http://devicetree.org/schemas/soc/aspeed/uart-routin[all...]