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Searched +full:ast2600 +full:- +full:lpc +full:- +full:reset (Results 1 – 10 of 10) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A Daspeed,ast2600-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED AST2600 Pin Controller
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2600-scu", "syscon", "simple-mfd"
29 const: aspeed,ast2600-pinctrl
32 $ref: pinmux-node.yaml#
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/linux/drivers/reset/
H A Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Simple Reset Controller Driver
7 * Based on Allwinner SoCs Reset Controller driver
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
47 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ibm-bonnell.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,bonnell-bmc", "aspeed,ast2600";
23 stdout-path = &uart5;
32 reserved-memory {
33 #address-cells = <1>;
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H A Daspeed-bmc-opp-tacoma.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
15 stdout-path = &uart5;
24 reserved-memory {
25 #address-cells = <1>;
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H A Daspeed-bmc-inventec-starscream.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/gpio/aspeed-gpio.h>
13 compatible = "inventec,starscream-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
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H A Daspeed-bmc-ufispace-ncplite.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "ufispace,ncplite-bmc", "aspeed,ast2600";
18 stdout-path = &uart5;
27 iio-hwmon {
28 compatible = "iio-hwmon";
29 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
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H A Daspeed-bmc-ibm-system1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,system1-bmc", "aspeed,ast2600";
74 stdout-path = "uart5:115200n8";
82 reserved-memory {
83 #address-cells = <1>;
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/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g6.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "../pinctrl-utils.h"
18 #include "pinctrl-aspeed.h"
20 #define SCU040 0x040 /* Reset Control Set 1 */
21 #define SCU400 0x400 /* Multi-function Pin Control #1 */
22 #define SCU404 0x404 /* Multi-function Pin Control #2 */
23 #define SCU40C 0x40C /* Multi-function Pin Control #3 */
24 #define SCU410 0x410 /* Multi-function Pin Control #4 */
25 #define SCU414 0x414 /* Multi-function Pin Control #5 */
26 #define SCU418 0x418 /* Multi-function Pin Control #6 */
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H A Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
41 #define SCU3C 0x3C /* System Reset Control/Status Register */
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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