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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-nominal.dtsi7 assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
13 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
19 assigned-clock-rates = <0>, <0>,
28 assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
29 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
30 assigned-clock-rates = <800000000>;
34 assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
36 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
38 assigned-clock-rates = <800000000>, <800000000>;
42 assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>,
[all …]
H A Dimx8-ss-dma.dtsi34 assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
35 assigned-clock-rates = <60000000>;
52 assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
53 assigned-clock-rates = <60000000>;
70 assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
71 assigned-clock-rates = <60000000>;
88 assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
89 assigned-clock-rates = <60000000>;
102 assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
103 assigned-clock-rates = <80000000>;
[all …]
H A Dimx8mn-evk.dtsi308 assigned-clocks = <&clk IMX8MN_CLK_CLKO1>;
309 assigned-clock-parents = <&clk IMX8MN_CLK_24M>;
310 assigned-clock-rates = <24000000>;
334 assigned-clocks = <&clk IMX8MN_CLK_PDM>;
335 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
336 assigned-clock-rates = <196608000>;
377 assigned-clocks = <&clk IMX8MN_CLK_SAI2>;
378 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
379 assigned-clock-rates = <24576000>;
386 assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
[all …]
H A Dimx8mp.dtsi758 assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
763 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
768 assigned-clock-rates = <0>, <0>,
819 assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
822 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
825 assigned-clock-rates = <1000000000>,
835 assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>,
837 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
839 assigned-clock-rates = <400000000>,
855 assigned-clocks = <&clk IMX8MP_CLK_GPU_AXI>,
[all …]
H A Dimx8ulp.dtsi303 assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
304 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
370 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
371 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
372 assigned-clock-rates = <48000000>;
383 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
384 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
385 assigned-clock-rates = <48000000>;
416 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
417 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
[all …]
/freebsd/crypto/openssl/doc/internal/man3/
H A Devp_md_get_number.pod40 Returns the internal dynamic number assigned to I<cipher>.
44 Returns the internal dynamic number assigned to the I<cipher>. This is only
49 Keturns the internal dynamic number assigned to I<kdf>.
53 Returns the internal dynamic number assigned to I<kem>.
57 Returns the internal dynamic number assigned to the I<exchange>.
61 Returns the internal dynamic number assigned to the I<keymgmt>.
65 Returns the internal dynamic number assigned to I<mac>.
69 Returns the internal dynamic number assigned to the I<md>. This is
74 Returns the internal dynamic number assigned to I<rand>.
78 Returns the internal dynamic number assigned to I<signature>.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dti,phy-j721e-wiz.yaml95 assigned-clocks:
98 assigned-clock-parents:
104 - assigned-clocks
105 - assigned-clock-parents
131 assigned-clocks:
134 assigned-clock-parents:
140 - assigned-clocks
141 - assigned-clock-parents
210 assigned-clocks = <&k3_clks 292 11>, <&k3_clks 292 0>;
211 assigned
[all...]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7ulp.dtsi154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
263 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
264 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dnvidia,tegra-audio-graph-card.yaml36 assigned-clocks:
40 assigned-clock-parents:
44 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
80 assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
83 assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
84 assigned-clock-rates = <368640000>, <49152000>, <12288000>;
102 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
103 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
[all …]
H A Dnvidia,tegra210-ahub.yaml44 assigned-clocks:
47 assigned-clock-parents:
50 assigned-clock-rates:
123 - assigned-clocks
124 - assigned-clock-parents
140 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
141 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
177 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
178 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
179 assigned-clock-rates = <1536000>;
[all …]
H A Dbrcm,cygnus-audio.txt13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
H A Dnvidia,tegra210-dmic.yaml46 assigned-clocks:
49 assigned-clock-parents:
52 assigned-clock-rates:
80 - assigned-clocks
81 - assigned-clock-parents
94 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
95 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
96 assigned-clock-rates = <3072000>;
H A Dnvidia,tegra186-dspk.yaml46 assigned-clocks:
49 assigned-clock-parents:
52 assigned-clock-rates:
80 - assigned-clocks
81 - assigned-clock-parents
95 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
96 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
97 assigned-clock-rates = <12288000>;
H A Dnvidia,tegra210-i2s.yaml60 assigned-clocks:
64 assigned-clock-parents:
68 assigned-clock-rates:
97 - assigned-clocks
98 - assigned-clock-parents
111 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
112 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
113 assigned-clock-rates = <1536000>;
H A Dmt2701-afe-pcm.txt47 - assigned-clocks: list of input clocks and dividers for the audio system.
49 - assigned-clocks-parents: parent of input clocks of assigned clocks.
50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j784s4-j742s2-main-common.dtsi125 assigned-clocks = <&k3_clks 157 34>;
126 assigned-clock-parents = <&k3_clks 157 63>;
290 assigned-clocks = <&k3_clks 97 2>;
291 assigned-clock-parents = <&k3_clks 97 3>;
302 assigned-clocks = <&k3_clks 98 2>;
303 assigned-clock-parents = <&k3_clks 98 3>;
314 assigned-clocks = <&k3_clks 99 2>;
315 assigned-clock-parents = <&k3_clks 99 3>;
326 assigned-clocks = <&k3_clks 100 2>;
327 assigned-clock-parents = <&k3_clks 100 3>;
[all …]
H A Dk3-j784s4-mcu-wakeup.dtsi172 assigned-clocks = <&k3_clks 35 2>;
173 assigned-clock-parents = <&k3_clks 35 3>;
187 assigned-clocks = <&k3_clks 117 2>;
188 assigned-clock-parents = <&k3_clks 117 3>;
201 assigned-clocks = <&k3_clks 118 2>;
202 assigned-clock-parents = <&k3_clks 118 3>;
215 assigned-clocks = <&k3_clks 119 2>;
216 assigned-clock-parents = <&k3_clks 119 3>;
229 assigned-clocks = <&k3_clks 120 2>;
230 assigned-clock-parents = <&k3_clks 120 3>;
[all …]
H A Dk3-j784s4-j742s2-mcu-wakeup-common.dtsi172 assigned-clocks = <&k3_clks 35 2>;
173 assigned-clock-parents = <&k3_clks 35 3>;
187 assigned-clocks = <&k3_clks 117 2>;
188 assigned-clock-parents = <&k3_clks 117 3>;
201 assigned-clocks = <&k3_clks 118 2>;
202 assigned-clock-parents = <&k3_clks 118 3>;
215 assigned-clocks = <&k3_clks 119 2>;
216 assigned-clock-parents = <&k3_clks 119 3>;
229 assigned-clocks = <&k3_clks 120 2>;
230 assigned-clock-parents = <&k3_clks 120 3>;
[all …]
H A Dk3-j721s2-mcu-wakeup.dtsi173 assigned-clocks = <&k3_clks 35 1>;
174 assigned-clock-parents = <&k3_clks 35 2>;
188 assigned-clocks = <&k3_clks 83 1>;
189 assigned-clock-parents = <&k3_clks 83 2>;
202 assigned-clocks = <&k3_clks 84 1>;
203 assigned-clock-parents = <&k3_clks 84 2>;
216 assigned-clocks = <&k3_clks 85 1>;
217 assigned-clock-parents = <&k3_clks 85 2>;
230 assigned-clocks = <&k3_clks 86 1>;
231 assigned-clock-parents = <&k3_clks 86 2>;
[all …]
H A Dk3-j721s2-main.dtsi229 assigned-clocks = <&k3_clks 63 1>;
230 assigned-clock-parents = <&k3_clks 63 2>;
241 assigned-clocks = <&k3_clks 64 1>;
242 assigned-clock-parents = <&k3_clks 64 2>;
253 assigned-clocks = <&k3_clks 65 1>;
254 assigned-clock-parents = <&k3_clks 65 2>;
265 assigned-clocks = <&k3_clks 66 1>;
266 assigned-clock-parents = <&k3_clks 66 2>;
277 assigned-clocks = <&k3_clks 67 1>;
278 assigned-clock-parents = <&k3_clks 67 2>;
[all …]
H A Dk3-j721e-mcu-wakeup.dtsi116 assigned-clocks = <&k3_clks 35 1>;
117 assigned-clock-parents = <&k3_clks 35 2>;
131 assigned-clocks = <&k3_clks 71 1>, <&k3_clks 322 0>;
132 assigned-clock-parents = <&k3_clks 71 2>, <&k3_clks 322 1>;
145 assigned-clocks = <&k3_clks 72 1>;
146 assigned-clock-parents = <&k3_clks 72 2>;
159 assigned-clocks = <&k3_clks 73 1>, <&k3_clks 323 0>;
160 assigned-clock-parents = <&k3_clks 73 2>, <&k3_clks 323 1>;
173 assigned-clocks = <&k3_clks 74 1>;
174 assigned-clock-parents = <&k3_clks 74 2>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi-controller-main.yaml109 assigned-clocks:
118 assigned-clock-parents:
248 - assigned-clocks
249 - assigned-clock-parents
273 - assigned-clocks
274 - assigned-clock-parents
298 - assigned-clocks
299 - assigned-clock-parents
322 - assigned-clocks
323 - assigned-clock-parents
[all …]
H A Ddpu.txt38 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
39 - assigned-clock-rates: list of clock frequencies sorted in the same order as
40 the assigned-clocks property.
70 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
71 - assigned-clock-rates: list of clock frequencies sorted in the same order as
72 the assigned-clocks property.
87 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>;
88 assigned-clock-rates = <300000000>;
116 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>,
118 assigned-clock-rates = <0 0 300000000 19200000>;
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4412-odroid-common.dtsi129 assigned-clocks = <&clock CLK_FOUT_EPLL>;
130 assigned-clock-rates = <45158401>;
134 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
140 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
143 assigned-clock-rates = <0>, <0>,
211 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
213 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
214 assigned-clock-rates = <0>, <176000000>;
219 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
221 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-clk-ccf.dtsi170 assigned-clocks = <&zynqmp_clk GEM_TSU>;
177 assigned-clocks = <&zynqmp_clk GEM_TSU>;
184 assigned-clocks = <&zynqmp_clk GEM_TSU>;
191 assigned-clocks = <&zynqmp_clk GEM_TSU>;
220 assigned-clocks = <&zynqmp_clk SDIO0_REF>;
225 assigned-clocks = <&zynqmp_clk SDIO1_REF>;
254 assigned-clocks = <&zynqmp_clk UART0_REF>;
259 assigned-clocks = <&zynqmp_clk UART1_REF>;
264 assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
273 assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
[all …]

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