Home
last modified time | relevance | path

Searched +full:armada +full:- +full:3700 +full:- +full:tbg +full:- +full:clock (Results 1 – 5 of 5) sorted by relevance

/linux/arch/arm64/boot/dts/marvell/
H A Darmada-37xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 37xx family of SoCs.
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
[all …]
H A Darmada-3720-turris-mox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
41 linux,default-trigger = "default-on";
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dmarvell,armada-3700-uart-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Marvell Armada 3720 UART clocks
9 - Pali Rohár <pali@kernel.org>
13 const: marvell,armada-3700-uart-clock
17 - description: UART Clock Control Register
18 - description: UART 2 Baud Rate Divisor Register
23 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
[all …]
/linux/drivers/clk/mvebu/
H A Darmada-37xx-tbg.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Marvell Armada 37xx SoC Time Base Generator clocks
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 #include <linux/clk-provider.h>
47 static const struct tbg_def tbg[NUM_TBG] = { variable
48 {"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF},
49 {"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8, TBG_B_VCODIV_DIFF},
50 {"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SE},
51 {"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SE},
60 return ((val >> ptbg->fbdiv_offset) & TBG_DIV_MASK) << 2; in tbg_get_mult()
[all …]
H A Darmada-37xx-periph.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Marvell Armada 37xx SoC Peripheral clocks
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 * TBG-A-P --| | | | | | ______
12 * TBG-B-P --| Mux |--| /div1 |--| /div2 |--| Gate |--> perip_clk
13 * TBG-A-S --| | | | | | |______|
14 * TBG-B-S --|_____| |_______| |_______|
17 * xtal clock as parent.
20 #include <linux/clk-provider.h>
201 .parent_names = (const char *[]){ "TBG-A-P", \
[all …]