Searched +full:arm11mp +full:- +full:twd +full:- +full:wdt (Results 1 – 5 of 5) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/timer/ |
H A D | arm,twd.txt | 3 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core 4 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer 7 The TWD is usually attached to a GIC to deliver its two per-processor 12 - compatible : Should be one of: 13 "arm,cortex-a9-twd-timer" 14 "arm,cortex-a5-twd-timer" 15 "arm,arm11mp-twd-timer" 17 - interrupts : One interrupt to each core 19 - reg : Specify the base address and the size of the TWD timer 24 - always-on : a boolean property. If present, the timer is powered through [all …]
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
H A D | arm,twd-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/arm,twd-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Timer-Watchdog Watchdog 10 - Rob Herring <robh@kernel.org> 13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core 14 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer 17 The TWD is usually attached to a GIC to deliver its two per-processor 23 - arm,cortex-a9-twd-wdt [all …]
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/freebsd/sys/contrib/device-tree/src/arm/arm/ |
H A D | arm-realview-eb-mp.dtsi | 23 #include <dt-bindings/interrupt-controller/irq.h> 24 #include <dt-bindings/gpio/gpio.h> 25 #include "arm-realview-eb.dtsi" 30 * and Cortex-A9 MPCore. 34 #address-cells = <1>; 35 #size-cells = <1>; 36 compatible = "arm,realview-eb-soc", "simple-bus"; 41 intc: interrupt-controller@1f000100 { 42 compatible = "arm,eb11mp-gic"; 43 #interrupt-cells = <3>; [all …]
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H A D | arm-realview-pb11mp.dts | 23 /dts-v1/; 24 #include <dt-bindings/interrupt-controller/irq.h> 25 #include <dt-bindings/gpio/gpio.h> 28 #address-cells = <1>; 29 #size-cells = <1>; 31 compatible = "arm,realview-pb11mp"; 52 #address-cells = <1>; 53 #size-cells = <0>; 54 enable-method = "arm,realview-smp"; 60 next-level-cache = <&L2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/marvell,mmp2.h> 7 #include <dt-bindings/power/marvell,mmp2.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 17 enable-method = "marvell,mmp3-smp"; 22 next-level-cache = <&l2>; [all …]
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