Home
last modified time | relevance | path

Searched +full:archs +full:- +full:intc (Results 1 – 16 of 16) sorted by relevance

/linux/arch/arc/boot/dts/
H A Daxc003_idu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
[all …]
H A Dvdk_axc003_idu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 * HS38x2 (Dual Core) with IDU intc (VDK version)
15 #address-cells = <1>;
16 #size-cells = <1>;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
28 clock-frequency = <50000000>;
[all …]
H A Daxc003.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
[all …]
H A Dhaps_hs_idu.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
5 /dts-v1/;
10 model = "snps,zebu_hs-smp";
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&core_intc>;
22 … "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 compatible = "simple-bus";
31 #address-cells = <1>;
[all …]
H A Dnsimosci_hs_idu.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
5 /dts-v1/;
10 model = "snps,nsimosci_hs-smp";
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&core_intc>;
18 …n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24 print-fatal-signals=1";
26 compatible = "simple-bus";
27 #address-cells = <1>;
[all …]
H A Dvdk_axc003.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
14 #address-cells = <1>;
15 #size-cells = <1>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
27 clock-frequency = <50000000>;
30 core_intc: archs-intc@cpu {
[all …]
H A Dnsimosci_hs.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
5 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&core_intc>;
20 …8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1";
28 compatible = "simple-bus";
29 #address-cells = <1>;
30 #size-cells = <1>;
[all …]
H A Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cells = <2>;
22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 #address-cells = <1>;
31 #size-cells = <0>;
62 input_clk: input-clk {
[all …]
H A Dhaps_hs.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
5 /dts-v1/;
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&core_intc>;
24 … "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
32 compatible = "simple-bus";
33 #address-cells = <1>;
34 #size-cells = <1>;
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsnps,archs-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/snps,archs-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARC-HS incore Interrupt Controller
10 - Vineet Gupta <vgupta@kernel.org>
13 ARC-HS incore Interrupt Controller provided by cores implementing ARCv2 ISA.
14 intc accessed via the special ARC AUX register interface, hence "reg" property
19 const: snps,archs-intc
21 interrupt-controller: true
[all …]
H A Dsnps,archs-idu-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/snps,archs-idu-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARC-HS Interrupt Distribution Unit
10 - Vineet Gupta <vgupta@kernel.org>
13 ARC-HS Interrupt Distribution Unit is an optional 2nd level interrupt
15 load balancing of common/external IRQs towards core intc.
22 const: snps,archs-idu-intc
24 interrupt-controller: true
[all …]
/linux/arch/arc/kernel/
H A Dintc-arcv2.c1 // SPDX-License-Identifier: GPL-2.0-only
25 * -Called very early (start_kernel -> setup_arch -> setup_processor)
26 * -Platform Independent (must for any ARC Core)
27 * -Needed for each CPU (hence not foldable into init_IRQ)
59 * ARCv2 core intc provides multiple interrupt priorities (up to 16). in arc_init_IRQ()
60 * Typical builds though have only two levels (0-high, 1-low) in arc_init_IRQ()
67 irq_prio = irq_bcr.prio; /* Encoded as N-1 for N levels */ in arc_init_IRQ()
68 pr_info("archs-intc\t: %d priority levels (default %d)%s\n", in arc_init_IRQ()
76 * Also disable private-per-core IRQ lines so faulty external HW won't in arc_init_IRQ()
101 write_aux_reg(AUX_IRQ_SELECT, data->hwirq); in arcv2_irq_mask()
[all …]
H A Dmcip.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <asm/irqflags-arcv2.h>
71 * STATUS32[H]/actionpoint/breakpoint/self-halt in mcip_update_debug_halt_mask()
183 * Connects external "COMMON" IRQs to core intc, providing:
184 * -dynamic routing (IRQ affinity)
185 * -load balancing (Round Robin interrupt distribution)
186 * -1:N distribution
232 idu_irq_mask_raw(data->hwirq); in idu_irq_mask()
240 __mcip_cmd_data(CMD_IDU_SET_MASK, data->hwirq, 0); in idu_irq_unmask()
249 __mcip_cmd(CMD_IDU_ACK_CIRQ, data->hwirq); in idu_irq_ack()
[all …]
/linux/arch/arc/plat-hsdk/
H A Dplatform.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * Peripherals on CPU Card are wired to cpu intc via intermediate in hsdk_enable_gpio_intc_wire()
36 * --------------------- in hsdk_enable_gpio_intc_wire()
37 * | snps,archs-intc | in hsdk_enable_gpio_intc_wire()
38 * --------------------- in hsdk_enable_gpio_intc_wire()
40 * ---------------------- in hsdk_enable_gpio_intc_wire()
41 * | snps,archs-idu-intc | in hsdk_enable_gpio_intc_wire()
42 * ---------------------- in hsdk_enable_gpio_intc_wire()
46 * ------------------- in hsdk_enable_gpio_intc_wire()
47 * | snps,dw-apb-intc | in hsdk_enable_gpio_intc_wire()
[all …]
/linux/drivers/clocksource/
H A Darc_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
11 * ARCv2 based HS38 cores have RTC (in-core) and GFRC (inside ARConnect/MCIP)
18 #include <linux/clk-provider.h>
65 * MCIP_CMD/MCIP_READBACK however micro-architecturally there's in arc_read_gfrc()
70 * trying to access two different sub-components (like GFRC, in arc_read_gfrc()
71 * inter-core interrupt, etc...). HW also supports simultaneously in arc_read_gfrc()
110 pr_warn("Global-64-bit-Ctr clocksource not detected\n"); in arc_cs_setup_gfrc()
111 return -ENXIO; in arc_cs_setup_gfrc()
[all …]
/linux/include/linux/
H A Dpci.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
60 * The PCI interface treats multi-function devices as independent
68 * In the interest of not exposing interfaces to user-space unnecessarily,
69 * the following kernel-only defines are being added here.
80 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
86 return kobject_name(&slot->kobj); in pci_slot_name()
97 /* #0-5: standard PCI resources */
99 PCI_STD_RESOURCE_END = PCI_STD_RESOURCES + PCI_STD_NUM_BARS - 1,
104 /* Device-specific resources */
[all …]