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/linux/Documentation/devicetree/bindings/timer/
H A Dsnps,archs-gfrc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/snps,archs-gfrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
10 - Vineet Gupta <vgupta@synopsys.com>
14 const: snps,archs-gfrc
20 - compatible
21 - clocks
26 - |
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/linux/drivers/clocksource/
H A Darc_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
11 * ARCv2 based HS38 cores have RTC (in-core) and GFRC (inside ARConnect/MCIP)
18 #include <linux/clk-provider.h>
65 * MCIP_CMD/MCIP_READBACK however micro-architecturally there's in arc_read_gfrc()
70 * trying to access two different sub-components (like GFRC, in arc_read_gfrc()
71 * inter-core interrupt, etc...). HW also supports simultaneously in arc_read_gfrc()
72 * accessing GFRC by multiple cores. in arc_read_gfrc()
74 * before access to GFRC instead of taking global MCIP spinlock in arc_read_gfrc()
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/linux/arch/arc/boot/dts/
H A Dskeleton_hs_idu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #address-cells = <1>;
9 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
45 compatible = "snps,arc-timer";
47 interrupt-parent = <&core_intc>;
51 /* 64-bit Global Free Running Counter */
52 gfrc {
53 compatible = "snps,archs-timer-gfrc";
H A Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cells = <2>;
22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 #address-cells = <1>;
31 #size-cells = <0>;
62 input_clk: input-clk {
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/linux/arch/arc/kernel/
H A Dmcip.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <asm/irqflags-arcv2.h>
23 * Set mask to halt GFRC if any online core in SMP cluster is halted.
28 struct bcr_generic gfrc; in mcip_update_gfrc_halt_mask() local
32 READ_BCR(ARC_REG_GFRC_BUILD, gfrc); in mcip_update_gfrc_halt_mask()
36 * GFRC 0x3 version. in mcip_update_gfrc_halt_mask()
38 if (gfrc.ver < 0x3) in mcip_update_gfrc_halt_mask()
71 * STATUS32[H]/actionpoint/breakpoint/self-halt in mcip_update_debug_halt_mask()
88 /* Update GFRC halt mask as new CPU came online */ in mcip_setup_per_cpu()
89 if (mp.gfrc) in mcip_setup_per_cpu()
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