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/linux/Documentation/livepatch/
H A Dreliable-stacktrace.rst20 debugging are unsound for livepatching. Livepatching depends on architectures
28 Architectures must implement one of the reliable stacktrace functions.
29 Architectures using CONFIG_ARCH_STACKWALK must implement
30 'arch_stack_walk_reliable', and other architectures must implement
56 architectures may need to verify that code has been compiled in a manner
59 functions use specific prologue and epilogue sequences. Architectures
71 The unwinding process varies across architectures, their respective procedure
73 details that architectures should consider.
89 architectures verify that a stacktrace ends at an expected location, e.g.
116 trace, it is strongly recommended that architectures positively identify code
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/linux/arch/arm/include/asm/
H A Ddma.h68 * Some architectures may need to do allocate an interrupt
74 * Some architectures may need to do free an interrupt
80 * On some architectures, this may have other side effects like
87 * On some architectures, this may have other side effects like
99 * especially since some DMA architectures don't update the
107 * especially since some DMA architectures don't update the
117 * especially since some DMA architectures don't update the
125 * especially since some DMA architectures don't update the
/linux/include/linux/
H A Dexecmem.h21 * Architectures define different restrictions on placement,
25 * and let architectures define parameters for ranges suitable for
65 * Architectures that use EXECMEM_ROX_CACHE must implement this.
91 * allocations on architectures that require it
121 * A hook for architectures to define parameters for allocations of
125 * For architectures that do not implement this method a default set of
165 * For architectures that use ROX cache the permissions will be set to R+W.
166 * For architectures that don't use ROX cache the default permissions for @type
H A Dkasan-enabled.h10 * Used by ARCH_DEFER_KASAN architectures and HW_TAGS mode.
16 * Uses static key for architectures that need deferred KASAN or HW_TAGS.
28 /* For architectures that can enable KASAN early, use compile-time check. */
H A Dsync_core.h10 * on all architectures which return to user-space through core serializing
25 * all architectures which provide unconditional core serializing instructions
H A Dhighuid.h20 * uid16_t and gid16_t are used on all architectures. (when dealing
74 * Everything below this line is needed on all architectures, to deal with
89 * Since these macros are used in architectures that only need limited
H A Dpgtable.h26 * On almost all architectures and configurations, 0 can be used as the
27 * upper ceiling to free_pgtables(): on many architectures it has the same
218 * is issued. Some architectures may benefit from doing this, and it is
246 * Some architectures know that a set of contiguous ptes all map the same
451 * Architectures that automatically set the access bit should overwrite it.
561 * For walking the pagetables without holding any locks. Some architectures
819 * gives up, simply does nothing, and continues; on architectures where
838 * Some architectures may be able to avoid expensive synchronization
951 * On some architectures hardware does not set page access bit when accessing
1060 * Doing so can allow in certain architectures to avoid a TLB flush in most
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/linux/Documentation/virt/kvm/
H A Dapi.rst115 Architectures:
116 which instruction set architectures provide this ioctl.
136 :Architectures: all
153 :Architectures: all
222 :Architectures: x86
266 :Architectures: all
285 :Architectures: all
311 :Architectures: all
358 :Architectures: all
396 :Architectures: all
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/linux/Documentation/core-api/
H A Dunaligned-memory-access.rst13 Linux runs on a wide variety of architectures which have varying behaviour
46 In reality, only a few architectures require natural alignment on all sizes
47 of memory access. However, we must consider ALL supported architectures;
59 - Some architectures are able to perform unaligned memory accesses
61 - Some architectures raise processor exceptions when unaligned accesses
64 - Some architectures raise processor exceptions when unaligned accesses
67 - Some architectures are not capable of unaligned memory access, but will
246 On architectures that require aligned loads, networking requires that the IP
249 architectures this constant has the value 2 because the normal ethernet
258 unnecessary on architectures that can do unaligned accesses, the code can be
/linux/Documentation/arch/arm/
H A Dsetup.rst7 for most ARM Linux architectures.
61 based machines. May be used differently by different architectures.
65 different architectures.
69 architectures.
102 then a value of 50 Mhz is the default on 21285 architectures.
/linux/virt/kvm/
H A DKconfig22 # Only strongly ordered architectures can select this, as it doesn't
30 # Weakly ordered architectures can only select this, advertising
36 # Allow enabling both the dirty bitmap and dirty ring. Only architectures
/linux/Documentation/mm/
H A Dnuma.rst49 architectures. As with physical cells, software nodes may contain 0 or more
55 For some architectures, such as x86, Linux will "hide" any node representing a
58 these architectures, one cannot assume that all CPUs that Linux associates with
61 In addition, for some architectures, again x86 is an example, Linux supports
117 On architectures that do not hide memoryless nodes, Linux will include only
145 architectures transparently, kernel subsystems can use the numa_mem_id()
/linux/include/asm-generic/
H A Daccess_ok.h7 * These definitions work on most architectures, but overrides can
12 * architectures with compat tasks have a variable TASK_SIZE and should
24 * On architectures with separate user address space (m68k, s390, parisc,
/linux/Documentation/
H A Datomic_t.txt152 are time critical and can, (typically) on LL/SC architectures, be more
201 These helper barriers exist because architectures have varying implicit
202 ordering on their SMP atomic primitives. For example our TSO architectures
326 indefinitely. However, this is not evident on LL/SC architectures, because
357 to fail on some architectures, let alone whatever the compiler makes of the C
361 Even native CAS architectures can fail to provide forward progress for their
365 to a failed CAS in order to ensure some progress. Affected architectures are
/linux/include/uapi/asm-generic/
H A Dsembuf.h9 * The semid64_ds structure for most architectures (though it came from x86_32
17 * 64 bit architectures use a 64-bit long time field here, while
18 * 32 bit architectures have a pair of unsigned long values.
H A Dposix_types.h11 * architectures, so that you can override them.
63 * Most 32 bit architectures use "unsigned int" size_t,
64 * and all 64 bit architectures use "unsigned long" size_t.
H A Dstat.h7 * eternity. Hopefully, this version gets used by new architectures
14 * By convention, 64 bit architectures use the stat interface, while
15 * 32 bit architectures use the stat64 interface. Note that we don't
/linux/Documentation/ABI/stable/
H A Dvdso7 On some architectures, when the kernel loads any userspace program it
31 ABI of those symbols is considered stable. It may vary across architectures,
36 The maintainers of the other vDSO-using architectures should confirm
/linux/Documentation/arch/powerpc/
H A Delf_hwcaps.rst148 supporting later architectures DO NOT set this feature.
161 supporting later architectures also set this feature.
183 supporting later architectures also set this feature.
210 supporting later architectures also set this feature.
229 supporting later architectures also set this feature.
/linux/Documentation/bpf/
H A Dbpf_design_QA.rst34 with two most used architectures x64 and arm64 (and takes into
35 consideration important quirks of other architectures) and
37 convention of the linux kernel on those architectures.
135 impossible to make generic and efficient across CPU architectures.
145 A: Because architectures like sparc have register windows and in general
146 there are enough subtle differences between architectures, so naive
167 CPU architectures and 32-bit HW accelerators. Can true 32-bit registers
174 programs for 32-bit architectures.
181 (a mov32 variant). This means that for architectures without zext hardware
/linux/arch/microblaze/
H A DKconfig54 microblaze architectures can be configured for either little or
105 On some architectures there is currently no way for the boot loader
106 to pass arguments to the kernel. For these architectures, you should
/linux/include/scsi/
H A Dsrp.h107 * having the 20-byte structure padded to 24 bytes on 64-bit architectures.
172 * bytes on 64-bit architectures.
254 * 64-bit architectures.
289 * on 64-bit architectures.
/linux/fs/resctrl/
H A DKconfig7 Some architectures provide hardware facilities to group tasks and
21 On architectures where this can be disabled independently, it is
/linux/tools/testing/selftests/kvm/
H A Dmmu_stress_test.c44 * For architectures that support skipping the faulting instruction, in guest_code()
47 * fixed-length architectures should work, but the cost of paranoia in guest_code()
63 * Only architectures that write the entire range can explicitly sync, in guest_code()
64 * as other architectures will be stuck on the write fault. in guest_code()
148 * the mprotect(PROT_READ) lands. Only architectures that support in vcpu_worker()
150 * be stuck on the faulting instruction for other architectures. Go to in vcpu_worker()
/linux/usr/
H A Dinitramfs_data.S17 The above example is for i386 - the parameters vary from architectures.
22 in the ELF header, as required by certain architectures.

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