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/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/
H A Dbranch.json18 "PublicDescription": "Instruction architecturally executed, branch not taken",
21 "BriefDescription": "Instruction architecturally executed, branch not taken"
24 "PublicDescription": "Instruction architecturally executed, immediate branch taken",
27 "BriefDescription": "Instruction architecturally executed, immediate branch taken"
30 …"PublicDescription": "Instruction architecturally executed, indirect branch excluding return retir…
33 …"BriefDescription": "Instruction architecturally executed, indirect branch excluding return retire…
36 "PublicDescription": "Instruction architecturally executed, predicted immediate branch",
39 "BriefDescription": "Instruction architecturally executed, predicted immediate branch"
42 "PublicDescription": "Instruction architecturally executed, mispredicted immediate branch",
45 "BriefDescription": "Instruction architecturally executed, mispredicted immediate branch"
[all …]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dinstruction.json66 …"PublicDescription": "This event counts architecturally executed zero blocking operations due to t…
69 …"BriefDescription": "This event counts architecturally executed zero blocking operations due to th…
72 … "PublicDescription": "This event counts architecturally executed floating-point move operations.",
75 "BriefDescription": "This event counts architecturally executed floating-point move operations."
78 …"PublicDescription": "This event counts architecturally executed operations that using predicate r…
81 …"BriefDescription": "This event counts architecturally executed operations that using predicate re…
84 …"PublicDescription": "This event counts architecturally executed inter-element manipulation operat…
87 …"BriefDescription": "This event counts architecturally executed inter-element manipulation operati…
90 …"PublicDescription": "This event counts architecturally executed inter-register manipulation opera…
93 …"BriefDescription": "This event counts architecturally executed inter-register manipulation operat…
[all …]
/linux/tools/perf/pmu-events/arch/arm64/
H A Dcommon-and-microarch.json3 "PublicDescription": "Instruction architecturally executed, Condition code check pass, software increment",
6 "BriefDescription": "Instruction architecturally executed, Condition code check pass, software increment"
39 "PublicDescription": "Instruction architecturally executed, condition code check pass, load",
42 "BriefDescription": "Instruction architecturally executed, condition code check pass, load"
45 "PublicDescription": "Instruction architecturally executed, condition code check pass, store",
48 "BriefDescription": "Instruction architecturally executed, condition code check pass, store"
51 "PublicDescription": "Instruction architecturally executed",
54 "BriefDescription": "Instruction architecturally executed"
63 "PublicDescription": "Instruction architecturally executed, condition check pass, exception return",
66 "BriefDescription": "Instruction architecturally execute
[all...]
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
H A Dretired.json8 "PublicDescription": "Counts instructions that have been architecturally executed."
12 …"PublicDescription": "Counts architecturally executed writes to the CONTEXTIDR register, which usu…
20 …"PublicDescription": "Counts architecturally executed branches, whether the branch is taken or not…
28 …"PublicDescription": "Counts micro-operations that are architecturally executed. This is a count o…
H A Dexception.json4 …"PublicDescription": "Counts any taken architecturally visible exceptions such as IRQ, FIQ, SError…
8 …"PublicDescription": "Counts any architecturally executed exception return instructions. Eg: AArch…
H A Dmemory.json8 … memory error (from either a speculative and abandoned access, or an architecturally executed acce…
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
H A Dretired.json8 "PublicDescription": "Counts instructions that have been architecturally executed."
12 "PublicDescription": "Counts architecturally executed writes to the CONTEXTIDR_EL1 register, which usually contain the kernel PID and can be output with hardware trace."
20 "PublicDescription": "Counts architecturally executed branches, whether the branch is taken or not. Instructions that explicitly write to the PC are also counted. Note that exception generating instructions, exception return instructions and context synchronization instructions are not counted."
28 "PublicDescription": "Counts micro-operations that are architecturally executed. This is a count of number of micro-operations retired from the commit queue in a single cycle."
H A Dexception.json4 "PublicDescription": "Counts any taken architecturally visible exceptions such as IRQ, FIQ, SError, and other synchronous exceptions. Exceptions are counted whether or not they are taken locally."
8 "PublicDescription": "Counts any architecturally executed exception return instructions. For example: AArch64: ERET"
H A Dmemory.json8 "PublicDescription": "Counts any detected correctable or uncorrectable physical memory errors (ECC or parity) in protected CPUs RAMs. On the core, this event counts errors in the caches (including data and tag rams). Any detected memory error (from either a speculative and abandoned access, or an architecturally executed access) is counted. Note that errors are only detected when the actual protected memory is accessed by an operation."
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
H A Dretired.json8 "PublicDescription": "Counts instructions that have been architecturally executed."
12 …"PublicDescription": "Counts architecturally executed writes to the CONTEXTIDR register, which usu…
20 …"PublicDescription": "Counts architecturally executed branches, whether the branch is taken or not…
H A Dexception.json4 …"PublicDescription": "Counts any taken architecturally visible exceptions such as IRQ, FIQ, SError…
8 …"PublicDescription": "Counts any architecturally executed exception return instructions. Eg: AArch…
H A Dmemory.json8 … memory error (from either a speculative and abandoned access, or an architecturally executed acce…
/linux/drivers/soc/qcom/
H A Dkryo-l2-accessors.c21 * Use architecturally required barriers for ordering between system register
41 * Use architecturally required barriers for ordering between system register
/linux/arch/x86/kvm/
H A Dpmu.h55 * Architecturally, Intel's SDM states that IA32_PERF_GLOBAL_CTRL is in kvm_pmu_has_perf_global_ctrl()
202 * architecturally required GP counters aren't present, i.e. if in kvm_init_pmu_capability()
204 * is architecturally required. in kvm_init_pmu_capability()
/linux/Documentation/arch/arm64/
H A Damu.rst27 of four fixed and architecturally defined 64-bit event counters.
32 - Instructions retired: increments with every architecturally executed
/linux/tools/perf/pmu-events/arch/arm64/ampere/emag/
H A Dinstruction.json42 "PublicDescription": "Instruction architecturally executed, software increment",
/linux/arch/arm/include/asm/
H A Dvirt.h14 * architecturally defined flag bit here.
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Driscv,cpu-intc.yaml19 cores. The timer interrupt comes from an architecturally mandated real-
/linux/arch/x86/include/asm/
H A Dspec-ctrl.h12 * would be easier if SPEC_CTRL were architecturally maskable or
/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-cti.yaml36 architecturally connected CTI an additional compatible string is used to
251 # v8 architecturally defined CTI - CPU + ETM connections generated by the
/linux/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer_mmio.yaml51 registers, which contain their architecturally-defined reset values. Only
H A Darm,arch_timer.yaml94 registers, which contain their architecturally-defined reset values. Only
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-mc.yaml15 Tegra30 Memory Controller architecturally consists of the following parts:
/linux/tools/perf/pmu-events/arch/x86/silvermont/
H A Dpipeline.json107 …er of any mispredicted branch instructions retired. This umask is an architecturally defined event…
164 …ate by dividing the event count by the core frequency. This event is architecturally defined and i…
189 …he elapsed time while the core was not in halt state. This event is architecturally defined and i…
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic-v3.rst108 architecturally defined behavior to allow software a full view of the
131 The GICD_STATUSR and GICR_STATUSR registers are architecturally defined such

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