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Searched +full:arc700 +full:- +full:intc (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsnps,arc700-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/snps,arc700-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARC700 incore Interrupt Controller
10 - Vineet Gupta <vgupta@kernel.org>
14 to ARC700 core.
16 intc accessed via the special ARC AUX register interface, hence "reg" property
21 const: snps,arc700-intc
23 interrupt-controller: true
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/linux/arch/arc/boot/dts/
H A Daxc001.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
28 clock-frequency = <750000000>;
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H A Dnsim_700.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&core_intc>;
17 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signal…
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
33 #clock-cells = <0>;
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H A Dnsimosci.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&core_intc>;
20 …8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1";
28 compatible = "simple-bus";
29 #address-cells = <1>;
30 #size-cells = <1>;
36 #clock-cells = <0>;
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H A Dabilis_tb10x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
12 compatible = "abilis,arc-tb10x";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 compatible = "snps,arc-timer";
30 interrupt-parent = <&intc>;
36 compatible = "snps,arc-timer";
41 #address-cells = <1>;
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/linux/arch/arc/kernel/
H A Dintc-compact.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)
18 * -Platform independent, needed for each CPU (not foldable into init_IRQ)
19 * -Called very early (start_kernel -> setup_arch -> setup_processor)
22 * -Optionally, setup the High priority Interrupts as Level 2 IRQs
38 pr_info("Level-2 interrupts bitset %x\n", level_mask); in arc_init_IRQ()
54 * ARC700 core includes a simple on-chip intc supporting
55 * -per IRQ enable/disable
56 * -2 levels of interrupts (high/low)
57 * -all interrupts being level triggered
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/linux/drivers/clocksource/
H A Darc_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
7 /* ARC700 has two 32bit independent prog Timers: TIMER0 and TIMER1, Each can be
11 * ARCv2 based HS38 cores have RTC (in-core) and GFRC (inside ARConnect/MCIP)
18 #include <linux/clk-provider.h>
65 * MCIP_CMD/MCIP_READBACK however micro-architecturally there's in arc_read_gfrc()
70 * trying to access two different sub-components (like GFRC, in arc_read_gfrc()
71 * inter-core interrupt, etc...). HW also supports simultaneously in arc_read_gfrc()
110 pr_warn("Global-64-bit-Ctr clocksource not detected\n"); in arc_cs_setup_gfrc()
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/linux/arch/arc/plat-axs10x/
H A Daxs10x.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
11 #include <asm/asm-offsets.h>
30 * Peripherals on CPU Card and Mother Board are wired to cpu intc via in axs10x_enable_gpio_intc_wire()
33 * --------------------- in axs10x_enable_gpio_intc_wire()
34 * | snps,arc700-intc | in axs10x_enable_gpio_intc_wire()
35 * --------------------- in axs10x_enable_gpio_intc_wire()
37 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
38 * | snps,dw-apb-gpio | | snps,dw-apb-gpio | in axs10x_enable_gpio_intc_wire()
39 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
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