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/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dqca,ar7100-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/qca,ar7100-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Atheros AR7xxx/AR9xxx GPIO controller
10 - Alban Bedel <albeu@free.fr>
15 - items:
16 - const: qca,ar9132-gpio
17 - const: qca,ar7100-gpio
18 - enum:
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H A Dgpio-ath79.txt1 Binding for Qualcomm Atheros AR7xxx/AR9xxx GPIO controller
4 - compatible: has to be "qca,<soctype>-gpio" and one of the following
6 - "qca,ar7100-gpio"
7 - "qca,ar9340-gpio"
8 - reg: Base address and size of the controllers memory area
9 - gpio-controller : Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two. The first cell is the pin number and the
12 - ngpios: Should be set to the number of GPIOs available on the SoC.
15 - interrupts: Interrupt specifier for the controllers interrupt.
16 - interrupt-controller : Identifies the node as an interrupt controller
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/freebsd/sys/contrib/device-tree/src/mips/qca/
H A Dar9132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
22 cpuintc: interrupt-controller {
23 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
25 interrupt-controller;
26 #interrupt-cells = <1>;
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H A Dar9331.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
22 cpuintc: interrupt-controller {
23 compatible = "qca,ar7100-cpu-intc";
25 interrupt-controller;
26 #interrupt-cells = <1>;
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