Searched full:apusys_pll (Results 1 – 3 of 3) sorted by relevance
20 The devices except apusys_pll provide clock gate control in different IP blocks.21 The apusys_pll provides Plls which generated from SoC 26m for AI Processing Unit.51 - mediatek,mt8195-apusys_pll234 apusys_pll: clock-controller@190f3000 {235 compatible = "mediatek,mt8195-apusys_pll";
733 /* APUSYS_PLL */
2937 apusys_pll: clock-controller@190f3000 {2938 compatible = "mediatek,mt8195-apusys_pll";2505 apusys_pll: clock-controller@190f3000 { global() label