Searched +full:ap806 +full:- +full:gicp (Results 1 – 6 of 6) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | marvell,ap806-gicp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-gicp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell GICP Controller 10 - Thomas Petazzoni <thomas.petazzoni@bootlin.com> 13 GICP is a Marvell extension of the GIC that allows to trigger GIC SPI 20 const: marvell,ap806-gicp 25 marvell,spi-ranges: 26 description: Tuples of GIC SPI interrupt ranges available for this GICP [all …]
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| H A D | marvell,gicp.txt | 1 Marvell GICP Controller 2 ----------------------- 4 GICP is a Marvell extension of the GIC that allows to trigger GIC SPI 11 - compatible: Must be "marvell,ap806-gicp" 13 - reg: Must be the address and size of the GICP SPI registers 15 - marvell,spi-ranges: tuples of GIC SPI interrupts ranges available 16 for this GICP 18 - msi-controller: indicates that this is an MSI controller 22 gicp_spi: gicp-spi@3f0040 { 23 compatible = "marvell,ap806-gicp"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-ap80x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/thermal/thermal.h> 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <2>; 25 compatible = "arm,psci-0.2"; 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; [all …]
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| /freebsd/sys/arm64/conf/ |
| H A D | std.marvell | 20 device mv_ap806_gicp # Marvell AP806 GICP 21 device mv_ap806_sei # Marvell AP806 SEI 23 # Real-time clock support 24 device mv_rtc # Marvell Real-time Clock 27 device safexcel # Inside Secure EIP-97 37 device uart_ns8250 # ns8250-type UART driver 58 device a37x0_xtal # Marvell xtal-clock 59 device a37x0_tbg # Marvell tbg-clock 60 device a37x0_nb_periph # Marvell north-bridge peripheral clock 61 device a37x0_sb_periph # Maravell south-bridge peripheral clock
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| H A D | NOTES | 2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs. 25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols 30 options VFP # Floating-point support 69 # Microsoft Hyper-V 80 device al_pci # Annapurna Alpine PCI-E 81 options PCI_HP # PCI-Express native HotPlug 82 options PCI_IOV # PCI SR-IOV support 102 # Broadcom MPT Fusion, version 4, is 64-bit only 103 device mpi3mr # LSI-Logic MPT-Fusion 4 116 device uart_ns8250 # ns8250-type UART driver [all …]
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| /freebsd/sys/arm/mv/ |
| H A D | mv_ap806_gicp.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 50 #include <dt-bindings/interrupt-controller/irq.h> 58 MALLOC_DEFINE(M_GICP, "gicp", "Marvell gicp driver"); 74 {"marvell,ap806-gicp", 1}, 78 #define RD4(sc, reg) bus_read_4((sc)->res, (reg)) 79 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 92 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in mv_ap806_gicp_probe() 95 device_set_desc(dev, "Marvell GICP"); in mv_ap806_gicp_probe() 107 sc->dev = dev; in mv_ap806_gicp_attach() [all …]
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