Searched +full:aon +full:- +full:apb +full:- +full:syscon (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Zhe Wang <zhe.wang1@unisoc.com>13 - $ref: ufs-common.yaml17 const: sprd,ums9620-ufs25 clock-names:27 - const: controller_eb28 - const: cfg_eb[all …]
1 // SPDX-License-Identifier: GPL-2.0 OR MIT7 /dts-v1/;8 #include <dt-bindings/clock/starfive,jh7110-crg.h>9 #include <dt-bindings/power/starfive,jh7110-pmu.h>10 #include <dt-bindings/reset/starfive,jh7110-crg.h>11 #include <dt-bindings/thermal/thermal.h>15 #address-cells = <2>;16 #size-cells = <2>;19 #address-cells = <1>;20 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)8 #include <dt-bindings/clock/sprd,sc9860-clk.h>11 interrupt-parent = <&gic>;12 #address-cells = <2>;13 #size-cells = <2>;16 compatible = "simple-bus";17 #address-cells = <2>;18 #size-cells = <2>;21 ap_ahb_regs: syscon@20210000 {22 compatible = "syscon";[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)8 #include <dt-bindings/clock/sprd,ums512-clk.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>12 interrupt-parent = <&gic>;13 #address-cells = <2>;14 #size-cells = <2>;17 #address-cells = <2>;18 #size-cells = <0>;20 cpu-map {51 compatible = "arm,cortex-a55";[all …]