/linux/Documentation/devicetree/bindings/arm/amlogic/ |
H A D | amlogic,meson-gx-ao-secure.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 15 secure firmware. 22 const: amlogic,meson-gx-ao-secure 24 - compatible 29 - items: 30 - const: amlogic,meson-gx-ao-secure [all …]
|
H A D | amlogic,meson-mx-secbus2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 14 contains registers for various IP blocks such as pin-controller bits for 15 the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. 16 The registers can be accessed directly when not running in "secure mode". 17 When "secure mode" is enabled then these registers have to be accessed 18 through secure monitor calls. [all …]
|
/linux/Documentation/devicetree/bindings/thermal/ |
H A D | amlogic,thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Guillaume La Roque <glaroque@baylibre.com> 14 $ref: thermal-sensor.yaml# 19 - items: 20 - enum: 21 - amlogic,g12a-cpu-thermal 22 - amlogic,g12a-ddr-thermal 23 - const: amlogic,g12a-thermal [all …]
|
/linux/arch/arm64/boot/dts/amlogic/ |
H A D | amlogic-a4-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 11 compatible = "arm,armv8-timer"; 19 compatible = "arm,psci-1.0"; 23 xtal: xtal-clk { 24 compatible = "fixed-clock"; 25 clock-frequency = <24000000>; 26 clock-output-names = "xtal"; [all …]
|
H A D | amlogic-t7.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/power/amlogic,t7-pwrc.h> 8 #include "amlogic-t7-reset.h" 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <0x2>; 17 #size-cells = <0x0>; 19 cpu-map { [all …]
|
H A D | meson-gx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/power/meson-gxbb-power.h> 16 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <2>; 29 reserved-memory { [all …]
|
H A D | meson-s4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/meson-s4-gpio.h> 10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h> 12 #include <dt-bindings/power/meson-s4-power.h> 13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h> 17 #address-cells = <2>; [all …]
|
H A D | amlogic-c3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> 12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> [all …]
|
H A D | meson-axg.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/axg-aoclkc.h> 7 #include <dt-bindings/clock/axg-audio-clkc.h> 8 #include <dt-bindings/clock/axg-clkc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/gpio/meson-axg-gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h> [all …]
|
/linux/drivers/clk/mediatek/ |
H A D | clk-mt8186-infra_ao.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 6 #include <linux/clk-provider.h> 8 #include <dt-bindings/clock/mt8186-clk.h> 9 #include <dt-bindings/reset/mt8186-resets.h> 11 #include "clk-gate.h" 12 #include "clk-mtk.h" 72 /* infra_ao_scp_core are main clock in always-on co-processor. */ 75 /* infra_ao_sej is main clock for secure engine with JTAG support */ 144 /* infra_ao_sspm is main clock in co-processor, should not be closed in Linux. */ [all …]
|
H A D | clk-mt8188-infra_ao.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 8 #include <dt-bindings/reset/mt8188-resets.h> 9 #include <linux/clk-provider.h> 12 #include "clk-gate.h" 13 #include "clk-mtk.h" 86 /* infra_ao_sej is main clock is for secure engine with JTAG support */ 209 { .compatible = "mediatek,mt8188-infracfg-ao", .data = &infra_ao_desc }, 218 .name = "clk-mt8188-infra_ao",
|
/linux/drivers/soc/amlogic/ |
H A D | meson-gx-socinfo.c | 5 * SPDX-License-Identifier: GPL-2.0+ 151 np = of_find_compatible_node(NULL, NULL, "amlogic,meson-gx-ao-secure"); in meson_gx_socinfo_init() 153 return -ENODEV; in meson_gx_socinfo_init() 158 return -ENODEV; in meson_gx_socinfo_init() 161 /* check if chip-id is available */ in meson_gx_socinfo_init() 162 if (!of_property_read_bool(np, "amlogic,has-chip-id")) { in meson_gx_socinfo_init() 164 return -ENODEV; in meson_gx_socinfo_init() 172 return -ENODEV; in meson_gx_socinfo_init() 181 return -EINVAL; in meson_gx_socinfo_init() 186 return -ENODEV; in meson_gx_socinfo_init() [all …]
|
/linux/fs/ntfs3/ |
H A D | super.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2019-2021 Paragon Software GmbH, All rights reserved. 9 * cluster - allocation unit - 512,1K,2K,4K,...,2M 10 * vcn - virtual cluster number - Offset inside the file in clusters. 11 * vbo - virtual byte offset - Offset inside the file in bytes. 12 * lcn - logical cluster number - 0 based cluster in clusters heap. 13 * lbo - logical byte offset - Absolute position inside volume. 14 * run - maps VCN to LCN - Stored in attributes in packed form. 15 * attr - attribute segment - std/name/data etc records inside MFT. 16 * mi - MFT inode - One MFT record(usually 1024 bytes or 4K), consists of attributes. [all …]
|
/linux/net/ipv4/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 40 so-called IP spoofing, however it can pose problems if you use 42 than packets from that host to you) or if you operate a non-routing 52 <file:Documentation/networking/ip-sysctl.rst>. 71 address into account. Furthermore, the TOS (Type-Of-Service) field 89 equal "cost" and chooses one of them in a non-deterministic fashion 132 <file:Documentation/admin-guide/nfs/nfsroot.rst> for details. 147 Read <file:Documentation/admin-guide/nfs/nfsroot.rst> for details. 160 <file:Documentation/admin-guide/nfs/nfsroot.rst> for details. 173 mobile-IP facilities (allowing laptops to seamlessly move between [all …]
|
/linux/drivers/soc/tegra/ |
H A D | pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved. 12 #define pr_fmt(fmt) "tegra-pmc: " fmt 14 #include <linux/arm-smccc.h> 16 #include <linux/clk-provider.h> 18 #include <linux/clk/clk-conf.h> 37 #include <linux/pinctrl/pinconf-generic.h> 56 #include <dt-bindings/interrupt-controller/arm-gic.h> 57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 58 #include <dt-bindings/gpio/tegra186-gpio.h> [all …]
|
/linux/arch/arm64/boot/dts/qcom/ |
H A D | x1e80100.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h> 8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h> 9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h> 10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h> 11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/interconnect/qcom,icc.h> 14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h> [all …]
|
/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
|