Searched +full:anti +full:- +full:backlash +full:- +full:3 +full:ns +full:- +full:enable (Results 1 – 2 of 2) sorted by relevance
4 - compatible: Should be one of7 - reg: SPI chip select numbert for the device8 - spi-max-frequency: Max SPI frequency to use (< 20000000)9 - clocks: From common clock binding. Clock is phandle to clock for13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).16 - adi,power-up-frequency: If set in Hz the PLL tunes to18 - adi,reference-div-factor: If set the driver skips dynamic calculation20 - adi,reference-doubler-enable: Enables reference doubler.21 - adi,reference-div2-enable: Enables reference divider.[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Michael Hennerich <michael.hennerich@analog.com>15 - adi,adf435016 - adi,adf435121 spi-max-frequency:28 clock-names:31 '#clock-cells':34 clock-output-names:[all …]