Searched +full:am3352 +full:- +full:gpmc (Results 1 – 13 of 13) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controller [all...] |
H A D | omap-gpmc.txt | 1 Device tree bindings for OMAP general purpose memory controllers (GPMC) 3 The actual devices are instantiated from the child nodes of a GPMC node. 7 - compatible: Should be set to one of the following: 9 ti,omap2420-gpmc (omap2420) 10 ti,omap2430-gpmc (omap2430) 11 ti,omap3430-gpmc (omap3430 & omap3630) 12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x) 13 ti,am3352-gpmc (am335x devices) 15 - reg: A resource specifier for the register space 17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments GPMC NAND Flash controller. 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 14 GPMC NAND controller/Flash is represented as a child of the 15 GPMC controller node. 20 - enum: [all …]
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H A D | ti,elm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Roger Quadros <rogerq@kernel.org> 13 ELM module is used together with GPMC and NAND Flash to detect 20 - ti,am3352-elm 21 - ti,am64-elm 33 clock-names: 35 - const: fck 37 power-domains: [all …]
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H A D | gpmc-nand.txt | 1 Device tree bindings for GPMC connected NANDs 3 GPMC connected NAND (found on OMAP boards) are represented as child nodes of 4 the GPMC controller with a name of "nand". 6 All timing relevant properties as well as generic gpmc child properties are 7 explained in a separate documents - please refer to 8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 11 Documentation/devicetree/bindings/mtd/nand-controller.yaml 16 - compatible: "ti,omap2-nand" 17 - reg: range id (CS number), base offset and length of the 19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount. [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | dm816x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm816.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/omap.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
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H A D | dm814x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm814.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/dm814x.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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H A D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 39 misc_pins: misc-pins { 40 pinctrl-single,pins = < [all …]
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H A D | am33xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/am33xx.h> 11 #include <dt-bindings/clock/am3.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 30 d-can0 = &dcan0; [all …]
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H A D | am4372.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/am4.h> 15 interrupt-parent = <&wakeupgen>; 16 #address-cells = <1>; 17 #size-cells = <1>; 41 #address-cells = <1>; [all …]
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H A D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 21 interrupt-parent = <&crossbar_mpu>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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