Searched +full:am3352 +full:- +full:d_can (Results 1 – 2 of 2) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/pinctrl/keystone.h>10 #include <dt-bindings/gpio/gpio.h>15 #address-cells = <2>;16 #size-cells = <2>;17 interrupt-parent = <&gic>;32 #address-cells = <1>;33 #size-cells = <0>;[all …]
9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>47 /* 16-bit c_can registers can be arranged differently in the memory48 * architecture of different implementations. For example: 16-bit49 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.55 return readw(priv->base + priv->regs[index]); in c_can_plat_read_reg_aligned_to_16bit()61 writew(val, priv->base + priv->regs[index]); in c_can_plat_write_reg_aligned_to_16bit()67 return readw(priv->base + 2 * priv->regs[index]); in c_can_plat_read_reg_aligned_to_32bit()73 writew(val, priv->base + 2 * priv->regs[index]); in c_can_plat_write_reg_aligned_to_32bit()79 const struct c_can_raminit *raminit = &priv->raminit_sys; in c_can_hw_raminit_wait_syscon()[all …]