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/linux/arch/x86/include/asm/
H A Dsmap.h14 #include <asm/alternative.h>
19 ALTERNATIVE "", "clac", X86_FEATURE_SMAP
22 ALTERNATIVE "", "stac", X86_FEATURE_SMAP
28 /* Note: a barrier is implicit in alternative() */ in clac()
29 alternative("", "clac", X86_FEATURE_SMAP); in clac()
34 /* Note: a barrier is implicit in alternative() */ in stac()
35 alternative("", "stac", X86_FEATURE_SMAP); in stac()
43 ALTERNATIVE("", "pushf; pop %0; " "clac" "\n\t", in smap_save()
53 ALTERNATIVE("", "push %0; popf\n\t", in smap_restore()
60 ALTERNATIVE("", "clac", X86_FEATURE_SMAP)
[all …]
H A Duaccess_64.h11 #include <asm/alternative.h>
29 asm (ALTERNATIVE("", in __untagged_addr()
60 * Masking the user address is an alternative to a conditional
128 ALTERNATIVE("rep movsb", in copy_user_generic()
190 ALTERNATIVE("rep stosb", in __clear_user()
H A Dnospec-branch.h10 #include <asm/alternative.h>
300 ALTERNATIVE "", \
314 ALTERNATIVE "", "verw mds_verw_sel(%rip)", X86_FEATURE_CLEAR_CPU_BUF
321 ALTERNATIVE "", "verw %cs:mds_verw_sel", X86_FEATURE_CLEAR_CPU_BUF
327 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP
331 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT
386 ALTERNATIVE("", \
512 asm volatile(ALTERNATIVE("", "wrmsr", %c[feature]) in alternative_msr_write()
/linux/arch/s390/include/asm/
H A Dalternative.h6 * Each alternative comes with a 32 bit feature field:
17 * in which context an alternative is supposed to be applied to the
24 * specific alternative patching.
27 * alternative should be applied.
66 u32 type : 8; /* type of alternative */
96 * | alternative instr 1 |
99 * | alternative instr 2 |
105 * | alternative instr |
129 /* alternative assembly primitive: */
130 #define ALTERNATIVE(oldinstr, altinstr, feature) \ macro
[all …]
/linux/tools/testing/selftests/net/
H A Daltnames.sh21 check_err $? "Failed to add short alternative name"
24 check_err $? "Failed to do link show with short alternative name"
27 check_err $? "Failed to get short alternative name from link show JSON"
30 check_err $? "Got unexpected short alternative name from link show JSON"
36 check_err $? "Failed to add long alternative name"
39 check_err $? "Failed to do link show with long alternative name"
42 check_err $? "Failed to get long alternative name from link show JSON"
45 check_err $? "Got unexpected long alternative name from link show JSON"
48 check_err $? "Failed to delete short alternative name"
51 check_fail $? "Unexpected success while trying to do link show with deleted short alternative name"
/linux/arch/arm64/include/asm/
H A Dalternative-macros.h41 * alternative assembly primitive:
117 * Alternative sequences
131 * alternative sequence it is defined in (branches into an
132 * alternative sequence are not fixed up).
136 * Begin an alternative code sequence.
165 * Provide the other half of the alternative code sequence.
178 * Complete an alternative code sequence.
190 * Callback-based alternative epilogue
197 * Provides a trivial alternative or default sequence consisting solely
213 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap));
[all …]
H A Dlse.h14 #include <asm/alternative.h>
15 #include <asm/alternative-macros.h>
28 ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
H A Darch_timer.h69 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in arch_timer_read_cntpct_el0()
81 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in arch_timer_read_cntvct_el0()
183 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in __arch_counter_get_cntpct()
204 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in __arch_counter_get_cntvct()
/linux/arch/parisc/include/asm/
H A Dcache.h9 #include <asm/alternative.h>
53 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
56 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
57 ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \
61 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
62 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) \
65 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
66 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")
H A Dalternative.h35 /* Alternative SMP implementation. */
36 #define ALTERNATIVE(cond, replacement) "!0:" \ macro
47 #define ALTERNATIVE(from, to, cond, replacement)\ macro
/linux/arch/loongarch/include/asm/
H A Dalternative.h21 * Debug flag that can be tested to see whether alternative
50 * Pad the second replacement alternative with additional NOPs if it is
51 * additionally longer than the first replacement alternative.
70 /* alternative assembly primitive: */
71 #define ALTERNATIVE(oldinstr, newinstr, feature) \ macro
92 * Alternative instructions for different CPU types or capabilities.
103 #define alternative(oldinstr, newinstr, feature) \ macro
104 (asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory"))
H A Dalternative-asm.h24 * Define an alternative between two instructions. If @feature is
29 .macro ALTERNATIVE oldinstr, newinstr, feature
54 * Same as ALTERNATIVE macro above but for two alternatives. If CPU
/linux/Documentation/networking/pse-pd/
H A Dpse-pi.rst32 design. As a result, the complexities of choosing between alternative pin
42 as Alternative A and Alternative B, which are distinguished not only by their
46 Alternative A and B Overview
49 - **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of
51 The power delivery's polarity in this alternative can vary based on the MDI
55 - **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of
58 1G/2G/5G/10GBaseT network. Alternative B includes two configurations with
65 The following table outlines the pin configurations for both Alternative A and
66 Alternative B.
69 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
[all …]
/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/
H A Devent_alternatives_tests_p9.c34 * alternative events is handled by respective PMU driver in event_alternatives_tests_p9()
50 * Expected to pass since PM_RUN_CYC_ALT in PMC2 has alternative event in event_alternatives_tests_p9()
63 * Expected to pass since PM_INST_DISP in PMC2 has alternative event in event_alternatives_tests_p9()
76 * Expected to pass since PM_BR_2PATH in PMC2 has alternative event in event_alternatives_tests_p9()
89 * Expected to pass since PM_LD_MISS_L1 in PMC3 has alternative event in event_alternatives_tests_p9()
102 * Expected to pass since PM_RUN_INST_CMPL_ALT in PMC4 has alternative event in event_alternatives_tests_p9()
H A Devent_alternatives_tests_p10.c35 * alternative events is handled by respective PMU driver in event_alternatives_tests_p10()
44 * Test for event alternative for 0x0001e in event_alternatives_tests_p10()
65 * Expected to pass since 0x0001e has alternative event in event_alternatives_tests_p10()
93 * Expected to pass since 0x00020 has alternative event in event_alternatives_tests_p10()
/linux/arch/riscv/include/asm/
H A Dalternative-macros.h19 .pushsection .alternative, "a"
70 ".pushsection .alternative, \"a\"\n" \
140 * ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k)
142 * asm(ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k));
151 #define ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k) \ macro
156 * ALTERNATIVE() to patch its customized content at the same location. In
158 * on the following sample code and then replace ALTERNATIVE() with
H A Dcpufeature-macros.h10 #include <asm/alternative-macros.h>
21 asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) in __riscv_has_extension_likely()
35 asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1) in __riscv_has_extension_unlikely()
H A Darch_hweight.h9 #include <asm/alternative-macros.h>
23 asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0, in __arch_hweight32()
54 asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0, in __arch_hweight64()
/linux/arch/x86/um/asm/
H A Dbarrier.h6 #include <asm/alternative.h>
15 #define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
16 #define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
17 #define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
/linux/arch/x86/entry/
H A Dcalling.h167 ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID
173 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
186 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
216 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
222 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
230 ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI
249 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
259 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
306 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
335 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
[all …]
/linux/Documentation/devicetree/bindings/net/pse-pd/
H A Dpse-controller.yaml75 - alternative-a
76 - alternative-b
86 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
H A Dti,tps23881.yaml100 pairset-names = "alternative-a", "alternative-b";
109 pairset-names = "alternative-a";
/linux/arch/s390/kernel/
H A Dalternative.c6 #include <asm/alternative.h>
17 * alternative code can overwrite previously scanned alternative code. in __apply_alternatives()
/linux/arch/parisc/kernel/
H A Dpacache.S26 #include <asm/alternative.h>
106 ALTERNATIVE(88b, fitdone, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
244 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP)
305 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
548 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
549 ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
677 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
743 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
775 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
792 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
[all …]
/linux/tools/arch/x86/lib/
H A Dmemset_64.S7 #include <asm/alternative.h>
22 * The FSRS alternative should be done inline (avoiding the call and
32 ALTERNATIVE "jmp memset_orig", "", X86_FEATURE_FSRS

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