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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-tmu.dtsi17 atlas0_alert_0: atlas0-alert-0 {
22 atlas0_alert_1: atlas0-alert-1 {
27 atlas0_alert_2: atlas0-alert-2 {
32 atlas0_alert_3: atlas0-alert-3 {
37 atlas0_alert_4: atlas0-alert-4 {
42 atlas0_alert_5: atlas0-alert-5 {
47 atlas0_alert_6: atlas0-alert-6 {
105 atlas1_alert_0: atlas1-alert-0 {
110 atlas1_alert_1: atlas1-alert-1 {
115 atlas1_alert_2: atlas1-alert-2 {
[all …]
H A Dexynos7-trip-points.dtsi10 cpu-alert-0 {
15 cpu-alert-1 {
20 cpu-alert-2 {
25 cpu-alert-3 {
30 cpu-alert-4 {
35 cpu-alert-5 {
40 cpu-alert-6 {
/linux/drivers/i2c/
H A Di2c-smbus.c21 struct work_struct alert; member
22 struct i2c_client *ara; /* Alert response address */
51 if (driver->alert) { in smbus_do_alert()
53 driver->alert(client, data->type, data->data); in smbus_do_alert()
56 dev_warn(&client->dev, "no driver alert()!\n"); in smbus_do_alert()
60 dev_dbg(&client->dev, "alert with no driver\n"); in smbus_do_alert()
68 /* Same as above, but call back all drivers with alert handler */
86 if (driver->alert) in smbus_do_alert_force()
87 driver->alert(client, data->type, data->data); in smbus_do_alert_force()
95 * The alert IRQ handler needs to hand work off to a task which can issue
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidxu3-common.dtsi61 cpu0_alert0: cpu-alert-0 {
66 cpu0_alert1: cpu-alert-1 {
71 cpu0_alert2: cpu-alert-2 {
81 cpu0_alert3: cpu-alert-3 {
86 cpu0_alert4: cpu-alert-4 {
144 cpu1_alert0: cpu-alert-0 {
149 cpu1_alert1: cpu-alert-1 {
154 cpu1_alert2: cpu-alert-2 {
164 cpu1_alert3: cpu-alert-3 {
169 cpu1_alert4: cpu-alert-4 {
[all …]
H A Dexynos5422-odroidhc1.dts36 cpu0_alert0: cpu-alert-0 {
41 cpu0_alert1: cpu-alert-1 {
91 cpu1_alert0: cpu-alert-0 {
96 cpu1_alert1: cpu-alert-1 {
135 cpu2_alert0: cpu-alert-0 {
140 cpu2_alert1: cpu-alert-1 {
179 cpu3_alert0: cpu-alert-0 {
184 cpu3_alert1: cpu-alert-1 {
223 gpu_alert0: gpu-alert-0 {
228 gpu_alert1: gpu-alert-1 {
H A Dexynos5420-trip-points.dtsi11 cpu-alert-0 {
16 cpu-alert-1 {
21 cpu-alert-2 {
H A Dexynos5420-arndale-octa.dts78 cpu0_alert0: cpu-alert-0 {
83 cpu0_alert1: cpu-alert-1 {
88 cpu0_alert2: cpu-alert-2 {
153 cpu1_alert0: cpu-alert-0 {
158 cpu1_alert1: cpu-alert-1 {
163 cpu1_alert2: cpu-alert-2 {
216 cpu2_alert0: cpu-alert-0 {
221 cpu2_alert1: cpu-alert-1 {
226 cpu2_alert2: cpu-alert-2 {
279 cpu3_alert0: cpu-alert-0 {
[all …]
H A Dexynos4-cpu-thermal.dtsi17 cpu_alert0: cpu-alert-0 {
22 cpu_alert1: cpu-alert-1 {
27 cpu_alert2: cpu-alert-2 {
/linux/net/handshake/
H A Dalert.c3 * Handle the TLS Alert protocol
27 * tls_alert_send - send a TLS Alert on a kTLS socket
29 * @level: TLS Alert level
30 * @description: TLS Alert description
41 u8 alert[2]; in tls_alert_send() local
46 alert[0] = level; in tls_alert_send()
47 alert[1] = description; in tls_alert_send()
48 iov.iov_base = alert; in tls_alert_send()
49 iov.iov_len = sizeof(alert); in tls_alert_send()
90 * tls_alert_recv - Parse TLS Alert messages
/linux/Documentation/devicetree/bindings/hwmon/
H A Dmax6697.txt30 - alert-mask
31 Alert bit mask. Alert disabled for bits set.
33 If not specified, alert will be enabled for all channels.
62 alert-mask = <0x72>;
H A Dti,ina2xx.yaml69 ti,alert-polarity-active-high:
70 description: Alert pin is asserted based on the value of Alert polarity Bit
74 the alert polarity to active-high.
99 ti,alert-polarity-active-high;
H A Dadi,adm1177.yaml31 the current reading and overcurrent alert is disabled.
35 Specifies the current level at which an over current alert occurs.
36 If not provided, the overcurrent alert is configured to max ADC range
/linux/Documentation/hwmon/
H A Dina3221.rst35 curr[123]_crit Critical alert current(mA) setting, activates the
38 curr[123]_crit_alarm Critical alert current limit exceeded
39 curr[123]_max Warning alert current(mA) setting, activates the
42 curr[123]_max_alarm Warning alert current limit exceeded
49 curr4_crit Critical alert current(mA) setting for sum of current
54 curr4_crit_alarm Critical alert current limit exceeded for sum of
H A Dlm90.rst494 * Filter and alert configuration register at 0xBF.
495 * ALERT is triggered by temperatures over critical limits.
506 * Consecutive alert register at 0x22.
509 * ALERT is triggered by open remote sensor.
568 * Filter and alert configuration register at 0xBF
595 SMBus Alert Support
598 This driver has basic support for SMBus alert. When an alert is received,
602 Semiconductor chips (NCT1008) do not implement the SMBus alert protocol
603 properly so additional care is needed: the ALERT output is disabled when
604 an alert is received, and is re-enabled only when the alarm is gone.
H A Dmax6639.rst38 temp1_crit RW Set ALERT temperature for input 1
39 temp2_crit RW Set ALERT temperature for input 2
51 temp1_crit_alarm R Alarm on ALERT temperature on channel 1
52 temp2_crit_alarm R Alarm on ALERT temperature on channel 2
/linux/Documentation/devicetree/bindings/power/supply/
H A Dmaxim,max17040.yaml31 maxim,alert-low-soc-level:
36 The alert threshold that sets the state of charge level (%) where an interrupt is generated.
69 Use this property to use alert low SoC level interrupt as wake up source.
87 maxim,alert-low-soc-level = <10>;
100 maxim,alert-low-soc-level = <10>;
125 maxim,alert-low-soc-level = <10>;
H A Dbattery.yaml113 - description: alert when ambient temperature is lower than this value
114 - description: alert when ambient temperature is higher than this value
116 alert-celsius:
119 - description: alert when battery temperature is lower than this value
120 - description: alert when battery temperature is higher than this value
172 alert-celsius = <0 40>;
H A Dmicrochip,ucs1002.yaml26 - const: alert
28 - const: alert
49 interrupt-names = "a_det", "alert";
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_thermal.c312 …* smu7_thermal_set_temperature_range - Set the requested temperature range for high and low alert …
315 * @low_temp: Temperature to be programmed for high alert signals
316 * @high_temp: Temperature to be programmed for low alert signals
374 uint32_t alert; in smu7_thermal_enable_alert() local
376 alert = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in smu7_thermal_enable_alert()
378 alert &= ~(SMU7_THERMAL_HIGH_ALERT_MASK | SMU7_THERMAL_LOW_ALERT_MASK); in smu7_thermal_enable_alert()
380 CG_THERMAL_INT, THERM_INT_MASK, alert); in smu7_thermal_enable_alert()
392 uint32_t alert; in smu7_thermal_disable_alert() local
394 alert = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in smu7_thermal_disable_alert()
396 alert |= (SMU7_THERMAL_HIGH_ALERT_MASK | SMU7_THERMAL_LOW_ALERT_MASK); in smu7_thermal_disable_alert()
[all …]
/linux/drivers/regulator/
H A Drt6190-regulator.c141 /* cleared cached alert event */ in rt6190_out_disable()
322 unsigned int alert; in rt6190_irq_handler() local
325 ret = regmap_read(data->regmap, RT6190_REG_ALERT1, &alert); in rt6190_irq_handler()
329 /* Write clear alert events */ in rt6190_irq_handler()
330 ret = regmap_write(data->regmap, RT6190_REG_ALERT1, alert); in rt6190_irq_handler()
334 data->cached_alert_evt |= alert; in rt6190_irq_handler()
336 if (alert & RT6190_ALERT_OTPEVT) in rt6190_irq_handler()
339 if (alert & RT6190_ALERT_UVPEVT) in rt6190_irq_handler()
342 if (alert & RT6190_ALERT_OVPEVT) in rt6190_irq_handler()
360 /* Mask unused alert */ in rt6190_init_registers()
/linux/drivers/thermal/ti-soc-thermal/
H A DKconfig9 This includes alert interrupts generation and also the TSHUT
48 This includes alert interrupts generation and also the TSHUT
60 This includes alert interrupts generation and also the TSHUT
72 This includes alert interrupts generation and also the TSHUT
/linux/arch/s390/include/asm/
H A Dcpu_mf.h21 #define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
22 #define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
23 #define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
24 #define CPU_MF_INT_CF_MTDA (1 << 15) /* loss of MT ctr. data alert */
25 #define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
26 #define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
137 unsigned int a:1; /* 1 - Alert request control */
229 MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */
/linux/drivers/power/supply/
H A Dmax17040_battery.c150 /* Low alert threshold from 32% to 1% of the State of Charge */
238 "maxim,alert-low-soc-level", in max17040_get_of_data()
243 dev_err(dev, "maxim,alert-low-soc-level out of bounds\n"); in max17040_get_of_data()
298 /* Returns true if alert cause was SOC change, not low SOC */
307 // this alert was caused by low soc in max17040_handle_soc_alert()
324 dev_warn(&chip->client->dev, "IRQ: Alert battery low level\n"); in max17040_thread_handler()
332 /* reset alert bit */ in max17040_thread_handler()
370 /* alert threshold can be programmed from 1% up to 16/32% */ in max17040_set_property()
515 "Failed to set low SOC alert: err %d\n", ret); in max17040_probe()
526 "Failed to set SOC alert: err %d\n", ret); in max17040_probe()
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ufispace-ncplite.dts50 psu0-alert-n {
51 label = "psu0-alert-n";
56 psu1-alert-n {
57 label = "psu1-alert-n";
62 int-thermal-alert {
63 label = "int-thermal-alert";
/linux/Documentation/power/
H A Dpower_supply_class.rst186 minimum capacity alert value in percents.
188 maximum capacity alert value in percents.
195 minimum battery temperature alert.
197 maximum battery temperature alert.
201 minimum ambient temperature alert.
203 maximum ambient temperature alert.

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