| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos5433-tmu.dtsi | 17 atlas0_alert_0: atlas0-alert-0 {
22 atlas0_alert_1: atlas0-alert-1 {
27 atlas0_alert_2: atlas0-alert-2 {
32 atlas0_alert_3: atlas0-alert-3 {
37 atlas0_alert_4: atlas0-alert-4 {
42 atlas0_alert_5: atlas0-alert-5 {
47 atlas0_alert_6: atlas0-alert-6 {
105 atlas1_alert_0: atlas1-alert-0 {
110 atlas1_alert_1: atlas1-alert-1 {
115 atlas1_alert_2: atlas1-alert-2 {
[all …]
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| H A D | exynos7-trip-points.dtsi | 10 cpu-alert-0 {
15 cpu-alert-1 {
20 cpu-alert-2 {
25 cpu-alert-3 {
30 cpu-alert-4 {
35 cpu-alert-5 {
40 cpu-alert-6 {
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| /linux/drivers/i2c/ |
| H A D | i2c-smbus.c | 22 struct work_struct alert; member
23 struct i2c_client *ara; /* Alert response address */
52 if (driver->alert) { in smbus_do_alert()
54 driver->alert(client, data->type, data->data); in smbus_do_alert()
57 dev_warn(&client->dev, "no driver alert()!\n"); in smbus_do_alert()
61 dev_dbg(&client->dev, "alert with no driver\n"); in smbus_do_alert()
69 /* Same as above, but call back all drivers with alert handler */
87 if (driver->alert) in smbus_do_alert_force()
88 driver->alert(client, data->type, data->data); in smbus_do_alert_force()
96 * The alert IRQ handler needs to hand work off to a task which can issue
[all …]
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5422-odroidxu3-common.dtsi | 61 cpu0_alert0: cpu-alert-0 {
66 cpu0_alert1: cpu-alert-1 {
71 cpu0_alert2: cpu-alert-2 {
81 cpu0_alert3: cpu-alert-3 {
86 cpu0_alert4: cpu-alert-4 {
144 cpu1_alert0: cpu-alert-0 {
149 cpu1_alert1: cpu-alert-1 {
154 cpu1_alert2: cpu-alert-2 {
164 cpu1_alert3: cpu-alert-3 {
169 cpu1_alert4: cpu-alert-4 {
[all …]
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| H A D | exynos5422-odroidhc1.dts | 36 cpu0_alert0: cpu-alert-0 {
41 cpu0_alert1: cpu-alert-1 {
91 cpu1_alert0: cpu-alert-0 {
96 cpu1_alert1: cpu-alert-1 {
135 cpu2_alert0: cpu-alert-0 {
140 cpu2_alert1: cpu-alert-1 {
179 cpu3_alert0: cpu-alert-0 {
184 cpu3_alert1: cpu-alert-1 {
223 gpu_alert0: gpu-alert-0 {
228 gpu_alert1: gpu-alert-1 {
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| H A D | exynos5420-trip-points.dtsi | 11 cpu-alert-0 {
16 cpu-alert-1 {
21 cpu-alert-2 {
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| H A D | exynos5420-arndale-octa.dts | 78 cpu0_alert0: cpu-alert-0 {
83 cpu0_alert1: cpu-alert-1 {
88 cpu0_alert2: cpu-alert-2 {
153 cpu1_alert0: cpu-alert-0 {
158 cpu1_alert1: cpu-alert-1 {
163 cpu1_alert2: cpu-alert-2 {
216 cpu2_alert0: cpu-alert-0 {
221 cpu2_alert1: cpu-alert-1 {
226 cpu2_alert2: cpu-alert-2 {
279 cpu3_alert0: cpu-alert-0 {
[all …]
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| H A D | exynos4-cpu-thermal.dtsi | 17 cpu_alert0: cpu-alert-0 {
22 cpu_alert1: cpu-alert-1 {
27 cpu_alert2: cpu-alert-2 {
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| /linux/net/handshake/ |
| H A D | alert.c | 3 * Handle the TLS Alert protocol
27 * tls_alert_send - send a TLS Alert on a kTLS socket
29 * @level: TLS Alert level
30 * @description: TLS Alert description
41 u8 alert[2]; in tls_alert_send() local
46 alert[0] = level; in tls_alert_send()
47 alert[1] = description; in tls_alert_send()
48 iov.iov_base = alert; in tls_alert_send()
49 iov.iov_len = sizeof(alert); in tls_alert_send()
90 * tls_alert_recv - Parse TLS Alert messages
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| /linux/Documentation/devicetree/bindings/hwmon/ |
| H A D | max6697.txt | 30 - alert-mask
31 Alert bit mask. Alert disabled for bits set.
33 If not specified, alert will be enabled for all channels.
62 alert-mask = <0x72>;
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| H A D | adi,adm1177.yaml | 31 the current reading and overcurrent alert is disabled.
35 Specifies the current level at which an over current alert occurs.
36 If not provided, the overcurrent alert is configured to max ADC range
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| /linux/Documentation/hwmon/ |
| H A D | ina3221.rst | 35 curr[123]_crit Critical alert current(mA) setting, activates the
38 curr[123]_crit_alarm Critical alert current limit exceeded
39 curr[123]_max Warning alert current(mA) setting, activates the
42 curr[123]_max_alarm Warning alert current limit exceeded
49 curr4_crit Critical alert current(mA) setting for sum of current
54 curr4_crit_alarm Critical alert current limit exceeded for sum of
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| H A D | sht3x.rst | 62 reading exceeds the configured limits, the alert attribute is set to 1 and
63 the alert pin on the sensor is set to high.
65 values, the alert bit is set to 0 and the alert pin on the sensor is set to
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| /linux/Documentation/devicetree/bindings/power/supply/ |
| H A D | maxim,max17040.yaml | 31 maxim,alert-low-soc-level:
36 The alert threshold that sets the state of charge level (%) where an interrupt is generated.
69 Use this property to use alert low SoC level interrupt as wake up source.
87 maxim,alert-low-soc-level = <10>;
100 maxim,alert-low-soc-level = <10>;
125 maxim,alert-low-soc-level = <10>;
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| H A D | battery.yaml | 113 - description: alert when ambient temperature is lower than this value
114 - description: alert when ambient temperature is higher than this value
116 alert-celsius:
119 - description: alert when battery temperature is lower than this value
120 - description: alert when battery temperature is higher than this value
172 alert-celsius = <0 40>;
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| H A D | microchip,ucs1002.yaml | 26 - const: alert
28 - const: alert
49 interrupt-names = "a_det", "alert";
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| /linux/Documentation/iio/ |
| H A D | ad7380.rst | 103 Alert section in Supported features
106 2 channels variants of the ad738x family, can use the SDOB line as an alert pin
108 alert pin when configured in 1 or 2 SDO line(s) mode, although only 1 SDO line
111 At the end of a conversion the active-low alert pin gets asserted if the
112 conversion result exceeds the alert high limit or falls below the alert low
113 limit. It is cleared, on a falling edge of CS. The alert pin is common to all
116 User can enable alert using the regular iio events attribute:
130 If debugfs is available, user can read the ALERT register to determine the
133 In most use cases, user will hardwire the alert pin to trigger a shutdown.
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| /linux/drivers/regulator/ |
| H A D | rt6190-regulator.c | 141 /* cleared cached alert event */ in rt6190_out_disable()
322 unsigned int alert; in rt6190_irq_handler() local
325 ret = regmap_read(data->regmap, RT6190_REG_ALERT1, &alert); in rt6190_irq_handler()
329 /* Write clear alert events */ in rt6190_irq_handler()
330 ret = regmap_write(data->regmap, RT6190_REG_ALERT1, alert); in rt6190_irq_handler()
334 data->cached_alert_evt |= alert; in rt6190_irq_handler()
336 if (alert & RT6190_ALERT_OTPEVT) in rt6190_irq_handler()
339 if (alert & RT6190_ALERT_UVPEVT) in rt6190_irq_handler()
342 if (alert & RT6190_ALERT_OVPEVT) in rt6190_irq_handler()
360 /* Mask unused alert */ in rt6190_init_registers()
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| /linux/drivers/thermal/ti-soc-thermal/ |
| H A D | Kconfig | 9 This includes alert interrupts generation and also the TSHUT
48 This includes alert interrupts generation and also the TSHUT
60 This includes alert interrupts generation and also the TSHUT
72 This includes alert interrupts generation and also the TSHUT
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| /linux/drivers/power/supply/ |
| H A D | max17040_battery.c | 150 /* Low alert threshold from 32% to 1% of the State of Charge */
238 "maxim,alert-low-soc-level", in max17040_get_of_data()
243 dev_err(dev, "maxim,alert-low-soc-level out of bounds\n"); in max17040_get_of_data()
298 /* Returns true if alert cause was SOC change, not low SOC */
307 // this alert was caused by low soc in max17040_handle_soc_alert()
324 dev_warn(&chip->client->dev, "IRQ: Alert battery low level\n"); in max17040_thread_handler()
332 /* reset alert bit */ in max17040_thread_handler()
370 /* alert threshold can be programmed from 1% up to 16/32% */ in max17040_set_property()
520 "Failed to set low SOC alert: err %d\n", ret); in max17040_probe()
531 "Failed to set SOC alert in max17040_probe()
[all...] |
| /linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-ufispace-ncplite.dts | 50 psu0-alert-n {
51 label = "psu0-alert-n";
56 psu1-alert-n {
57 label = "psu1-alert-n";
62 int-thermal-alert {
63 label = "int-thermal-alert";
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am62a-thermal.dtsi | 15 main0_alert: main0-alert {
46 main1_alert: main1-alert {
77 main2_alert: main2-alert {
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| H A D | k3-am62p-j722s-common-thermal.dtsi | 15 main0_alert: main0-alert {
46 main1_alert: main1-alert {
77 main2_alert: main2-alert {
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| /linux/arch/s390/kvm/ |
| H A D | interrupt.c | 180 * gisa_set_iam - change the GISA interruption alert mask
185 * Change the IAM atomically with the next alert address and the IPM
186 * of the GISA if the GISA is not part of the GIB alert list. All three
190 * -EBUSY in case the gisa is part of the alert list
211 * Clear the IPM atomically with the next alert address and the IAM
230 * Atomically restores the interruption alert mask if none of the
242 alert_mask = READ_ONCE(gi->alert.mask); in gisa_get_ipm_or_restore_iam()
3080 * If the NONE_GISA_ADDR is still stored in the alert list in process_gib_alert_list()
3082 * been added to the alert list by millicode while processing in process_gib_alert_list()
3083 * the current alert list. in process_gib_alert_list()
[all …]
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| /linux/tools/perf/util/ |
| H A D | s390-cpumcf-kernel.h | 32 unsigned int mtda:1; /* Loss of MT ctr. data alert */
33 unsigned int caca:1; /* Counter auth. change alert */
34 unsigned int lcda:1; /* Loss of counter data alert */
|