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/linux/Documentation/devicetree/bindings/ata/
H A Dceva,ahci-1v84.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ceva AHCI SATA Controller
10 - Mubin Sayyed <mubin.sayyed@amd.com>
11 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
14 The Ceva SATA controller mostly conforms to the AHCI interface with some
15 special extensions to add functionality, is a high-performance dual-port
16 SATA host controller with an AHCI compliant command layer which supports
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/linux/drivers/ata/
H A Dahci_ceva.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * CEVA AHCI SATA platform driver
6 * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
16 #include "ahci.h"
33 #define PAXIC_MARIDD(i) ((((i) * 2) + 1) << 16)
34 #define PAXIC_MAWIDD(i) ((((i) * 2) + 1) << 8)
51 #define PPCFG_PSSO_EN (1 << 28)
52 #define PPCFG_PSS_EN (1 << 29)
53 #define PPCFG_ESDF_EN (1 << 31)
59 #define PTC_RSVD (1 << 27)
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/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
21 #include <dt-bindings/thermal/thermal.h>
25 #address-cells = <2>;
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