/freebsd/sys/dev/clk/allwinner/ |
H A D | ccu_a10.c | 106 CCU_GATE(CLK_AHB_OTG, "ahb-otg", "ahb", 0x60, 0) 107 CCU_GATE(CLK_AHB_EHCI0, "ahb-ehci0", "ahb", 0x60, 1) 108 CCU_GATE(CLK_AHB_OHCI0, "ahb-ohci0", "ahb", 0x60, 2) 109 CCU_GATE(CLK_AHB_EHCI1, "ahb-ehci1", "ahb", 0x60, 3) 110 CCU_GATE(CLK_AHB_OHCI1, "ahb-ohci1", "ahb", 0x60, 4) 111 CCU_GATE(CLK_AHB_SS, "ahb-ss", "ahb", 0x60, 5) 112 CCU_GATE(CLK_AHB_DMA, "ahb-dma", "ahb", 0x60, 6) 113 CCU_GATE(CLK_AHB_BIST, "ahb-bist", "ahb", 0x60, 7) 114 CCU_GATE(CLK_AHB_MMC0, "ahb-mmc0", "ahb", 0x60, 8) 115 CCU_GATE(CLK_AHB_MMC1, "ahb-mmc1", "ahb", 0x60, 9) [all …]
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H A D | ccu_a13.c | 103 CCU_GATE(CLK_AHB_OTG, "ahb-otg", "ahb", 0x60, 0) 104 CCU_GATE(CLK_AHB_EHCI, "ahb-ehci", "ahb", 0x60, 1) 105 CCU_GATE(CLK_AHB_OHCI, "ahb-ohci", "ahb", 0x60, 2) 106 CCU_GATE(CLK_AHB_SS, "ahb-ss", "ahb", 0x60, 5) 107 CCU_GATE(CLK_AHB_DMA, "ahb-dma", "ahb", 0x60, 6) 108 CCU_GATE(CLK_AHB_BIST, "ahb-bist", "ahb", 0x60, 7) 109 CCU_GATE(CLK_AHB_MMC0, "ahb-mmc0", "ahb", 0x60, 8) 110 CCU_GATE(CLK_AHB_MMC1, "ahb-mmc1", "ahb", 0x60, 9) 111 CCU_GATE(CLK_AHB_MMC2, "ahb-mmc2", "ahb", 0x60, 10) 112 CCU_GATE(CLK_AHB_NAND, "ahb-nand", "ahb", 0x60, 13) [all …]
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H A D | ccu_d1.c | 125 CCU_GATE(CLK_BUS_DE, "bus-de", "psi-ahb", 0x60C, 0) 126 CCU_GATE(CLK_BUS_DI, "bus-di", "psi-ahb", 0x62C, 0) 127 CCU_GATE(CLK_BUS_G2D, "bus-g2d", "psi-ahb", 0x63C, 0) 128 CCU_GATE(CLK_BUS_CE, "bus-ce", "psi-ahb", 0x68C, 0) 129 CCU_GATE(CLK_BUS_VE, "bus-ve", "psi-ahb", 0x690, 0) 130 CCU_GATE(CLK_BUS_DMA, "bus-dma", "psi-ahb", 0x70C, 0) 131 CCU_GATE(CLK_BUS_MSGBOX0, "bus-msgbox0", "psi-ahb", 0x71C, 0) 132 CCU_GATE(CLK_BUS_MSGBOX1, "bus-msgbox1", "psi-ahb", 0x71C, 1) 133 CCU_GATE(CLK_BUS_MSGBOX2, "bus-msgbox2", "psi-ahb", 0x71C, 2) 134 CCU_GATE(CLK_BUS_SPINLOCK, "bus-spinlock", "psi-ahb", 0x72C, 0) [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/ |
H A D | nvidia,tegra20-ahb.txt | 1 NVIDIA Tegra AHB 4 - compatible : For Tegra20, must contain "nvidia,tegra20-ahb". For 5 Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain 6 '"nvidia,<chip>-ahb", "nvidia,tegra30-ahb"' where <chip> is tegra124, 14 ahb: ahb@6000c004 { 15 compatible = "nvidia,tegra20-ahb"; 16 reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
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/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | qcom,pcie.txt | 92 - "iface" Configuration AHB clock 127 - "ahb" AHB clock 144 - "iface" AHB clock 203 - "ahb" AHB reset 228 - "ahb" AHB reset 229 - "phy_ahb" PHY AHB reset 241 - "ahb" AHB Reset 253 - "ahb" AHB Reset 266 - "ahb" AHB reset 354 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
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H A D | qcom,pcie.yaml | 240 - const: iface # Configuration AHB clock 251 - const: ahb # AHB reset 274 - const: iface # Configuration AHB clock 315 - const: ahb # AHB reset 316 - const: phy_ahb # PHY AHB reset 355 - const: ahb # AHB clock 367 - const: ahb # AHB Reset 399 - const: ahb # AHB Reset 416 - const: iface # AHB clock 430 - const: ahb # AHB reset [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | allwinner,sun5i-a13-ahb-clk.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun5i-a13-ahb-clk.yaml# 7 title: Allwinner A13 AHB Clock 20 const: allwinner,sun5i-a13-ahb-clk 44 ahb@1c20054 { 46 compatible = "allwinner,sun5i-a13-ahb-clk"; 49 clock-output-names = "ahb";
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H A D | allwinner,sun4i-a10-ahb-clk.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml# 7 title: Allwinner A10 AHB Clock 21 - allwinner,sun4i-a10-ahb-clk 51 const: allwinner,sun4i-a10-ahb-clk 82 ahb@1c20054 { 84 compatible = "allwinner,sun4i-a10-ahb-clk"; 87 clock-output-names = "ahb";
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H A D | nspire-clock.txt | 5 "lsi,nspire-cx-ahb-divider" for the AHB divider in the CX model 6 "lsi,nspire-classic-ahb-divider" for the AHB divider in the older model 14 - clocks: For the "nspire-*-ahb-divider" compatible clocks, this is the parent
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H A D | allwinner,sun9i-a80-ahb-clk.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-ahb-clk.yaml# 7 title: Allwinner A80 AHB Clock 20 const: allwinner,sun9i-a80-ahb-clk 46 compatible = "allwinner,sun9i-a80-ahb-clk";
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H A D | allwinner,sun4i-a10-gates-clk.yaml | 26 - const: allwinner,sun4i-a10-ahb-gates-clk 27 - const: allwinner,sun5i-a10s-ahb-gates-clk 28 - const: allwinner,sun5i-a13-ahb-gates-clk 29 - const: allwinner,sun7i-a20-ahb-gates-clk 100 compatible = "allwinner,sun4i-a10-ahb-gates-clk"; 102 clocks = <&ahb>;
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H A D | starfive,jh7110-aoncrg.yaml | 24 - description: STG AXI/AHB 31 - description: STG AXI/AHB or GMAC0 RGMII RX 32 - description: APB Bus or STG AXI/AHB 40 - description: STG AXI/AHB
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H A D | qca,ath79-pll.txt | 3 The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. 20 - clock-output-names: should be "cpu", "ddr", "ahb" 32 clock-output-names = "cpu", "ddr", "ahb";
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/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/ |
H A D | qcom,geni-se.yaml | 95 - const: s-ahb 99 - description: Slave AHB Clock 110 - const: m-ahb 111 - const: s-ahb 115 - description: Master AHB Clock 116 - description: Slave AHB Clock 132 clock-names = "m-ahb", "s-ahb";
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/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | arm-pl08x.txt | 15 - lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs 16 - lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs 17 - mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents 18 - mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents 21 which AHB master that is used. 33 - dmas: List of DMA controller phandle, request channel and AHB master id
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H A D | snps-dma.txt | 9 - dma-masters: Number of AHB masters supported by the controller 16 - data-width: Maximum data width supported by hardware per AHB master 21 - data_width: Maximum data width supported by hardware per AHB master 28 - snps,dma-protection-control: AHB HPROT[3:1] protection setting.
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/freebsd/sys/contrib/device-tree/Bindings/misc/ |
H A D | intel,ixp4xx-ahb-queue-manager.yaml | 5 $id: http://devicetree.org/schemas/misc/intel,ixp4xx-ahb-queue-manager.yaml# 8 title: Intel IXP4xx AHB Queue Manager 14 The IXP4xx AHB Queue Manager maintains queues as circular buffers in 26 - const: intel,ixp4xx-ahb-queue-manager 48 compatible = "intel,ixp4xx-ahb-queue-manager";
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/freebsd/sys/contrib/device-tree/Bindings/iommu/ |
H A D | nvidia,tegra30-smmu.txt | 10 - nvidia,ahb : phandle to the ahb bus connected to SMMU. 20 nvidia,ahb = <&ahb>;
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | allwinner,sun4i-a10-nand.yaml | 34 - const: ahb 41 const: ahb 100 clock-names = "ahb", "mod"; 102 reset-names = "ahb";
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/freebsd/sys/contrib/device-tree/src/arm/allwinner/ |
H A D | sun6i-a31.dtsi | 294 clock-names = "ahb", 347 clock-names = "ahb", 395 clock-names = "ahb", 400 reset-names = "ahb"; 416 clock-names = "ahb", 421 reset-names = "ahb"; 437 clock-names = "ahb", 442 reset-names = "ahb"; 456 clock-names = "ahb", 461 reset-names = "ahb"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/ |
H A D | allwinner,sun4i-a10-tcon.yaml | 185 - const: ahb 204 - const: ahb 224 - const: ahb 245 - const: ahb 265 - const: ahb 389 clock-names = "ahb", 463 clock-names = "ahb", 532 clock-names = "ahb", "tcon-ch0"; 582 clock-names = "ahb", "tcon-ch0"; 637 clock-names = "ahb", "tcon-ch1";
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-ath79.txt | 6 - clocks: phandle of the AHB clock. 7 - clock-names: has to be "ahb". 20 clock-names = "ahb";
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | gmu.yaml | 146 - description: GPU AHB clock 155 - const: ahb 210 - description: GPU AHB clock 217 - const: ahb 246 - description: GPU AHB clock 255 - const: ahb
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H A D | dpu-sc7180.yaml | 33 - description: Display AHB clock from gcc 34 - description: Display AHB clock from dispcc 40 - const: ahb 96 - description: Display ahb clock 182 clock-names = "iface", "ahb", "core";
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H A D | dpu-sc7280.yaml | 32 - description: Display AHB clock from gcc 33 - description: Display AHB clock from dispcc 39 - const: ahb 95 - description: Display ahb clock 181 "ahb",
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