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/linux/drivers/gpu/drm/msm/
H A DMakefile8 adreno-y := \
9 adreno/adreno_device.o \
10 adreno/adreno_gpu.o \
11 adreno/a2xx_catalog.o \
12 adreno/a2xx_gpu.o \
13 adreno/a2xx_gpummu.o \
14 adreno/a3xx_catalog.o \
15 adreno/a3xx_gpu.o \
16 adreno/a4xx_catalog.o \
17 adreno/a4xx_gpu.o \
[all …]
H A Dmsm_drv.c1016 { .compatible = "qcom,adreno" },
1017 { .compatible = "qcom,adreno-3xx" },
H A Dmsm_iommu.c7 #include <linux/adreno-smmu-priv.h>
H A Dmsm_drv.h522 /* adreno needs pitch aligned to 32 pixels: */ in align_pitch()
/linux/Documentation/devicetree/bindings/display/msm/
H A Dgpu.yaml8 title: Adreno or Snapdragon GPUs
20 - qcom,adreno
29 The driver is parsing the compat string for Adreno to
32 - pattern: '^qcom,adreno-[0-9a-f]{8}$'
33 - const: qcom,adreno
35 The driver is parsing the compat string for Adreno to
38 - pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]+$'
39 - const: qcom,adreno
149 pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]+$'
173 description: GPU RBBM Timer for Adreno 5xx series
[all …]
H A Dmdp4.yaml7 title: Qualcomm Adreno/Snapdragon MDP4 display controller
H A Dqcom,mdp5.yaml7 title: Qualcomm Adreno/Snapdragon Mobile Display controller (MDP5)
H A Dhdmi.yaml8 title: Qualcomm Adreno/Snapdragon HDMI output
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm636.dtsi13 * different CPU frequencies, Adreno
21 compatible = "qcom,adreno-509.0", "qcom,adreno";
22 /* Adreno 509 shares the frequency table with 512 */
H A Dqcm2290.dtsi1435 compatible = "qcom,adreno-07000200", "qcom,adreno";
1532 compatible = "qcom,adreno-gmu-wrapper";
1556 compatible = "qcom,qcm2290-smmu-500", "qcom,adreno-smmu",
H A Dmsm8998.dtsi1510 compatible = "qcom,adreno-540.1", "qcom,adreno";
1595 * GPU-CX for SMMU but we need both of them up for Adreno.
1597 * domain in the Adreno driver.
1599 * SoC VDDMX RPM Power Domain in the Adreno driver.
H A Dmsm8976.dtsi1123 compatible = "qcom,adreno-510.0", "qcom,adreno";
H A Dmsm8953.dtsi1049 compatible = "qcom,adreno-506.0", "qcom,adreno";
/linux/drivers/gpu/drm/msm/registers/
H A D.gitignore2 adreno/adreno_control_regs.xml
3 adreno/adreno_pipe_regs.xml
4 adreno/ocmem.xml
/linux/drivers/gpu/drm/msm/adreno/
H A Dadreno_device.c142 /* first search the compat strings for qcom,adreno-XYZ.W: */ in find_chipid()
147 if (sscanf(compat, "qcom,adreno-%u.%u", &r, &patch) == 2 || in find_chipid()
165 if (sscanf(compat, "qcom,adreno-%08x", chipid) == 1) in find_chipid()
214 dev_warn(drm->dev, "failed to load adreno gpu\n"); in adreno_bind()
288 { .compatible = "qcom,adreno" },
289 { .compatible = "qcom,adreno-3xx" },
399 .name = "adreno",
H A Da5xx_catalog.c76 /* Adreno 509 uses the same ZAP as 512 */
H A Da5xx_gpu.c648 * Adreno 506 have CPZ Retention feature and doesn't require in a5xx_zap_shader_resume()
1361 /* Adreno 505, 506, 508, 509, 510, 512 needs manual RBBM sus/res control */ in a5xx_pm_resume()
1418 * entries on Adreno A510 and A530 (the others will tend to lock up) in a5xx_pm_suspend()
1581 /* First get the generic state from the adreno core */ in a5xx_gpu_state_get()
H A Dadreno_gpu.h640 /* ringbuffer helpers (the parts that are adreno specific) */
/linux/include/linux/
H A Dadreno-smmu-priv.h38 * struct adreno_smmu_priv - private interface between adreno-smmu and GPU
40 * @cookie: An opque token provided by adreno-smmu and passed
59 * The GPU driver (drm/msm) and adreno-smmu work together for controlling
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974pro.dtsi9 compatible = "qcom,adreno-330.2", "qcom,adreno";
H A Dqcom-msm8226.dtsi1152 compatible = "qcom,adreno-305.18", "qcom,adreno";
H A Dqcom-apq8064.dtsi995 compatible = "qcom,adreno-320.2", "qcom,adreno";
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,hdmi-phy-qmp.yaml8 title: Qualcomm Adreno/Snapdragon QMP HDMI phy
H A Dqcom,hdmi-phy-other.yaml8 title: Qualcomm Adreno/Snapdragon HDMI phy
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da6xx_gmu.xml6 <import file="adreno/adreno_common.xml"/>

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