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/linux/drivers/gpu/drm/msm/
H A DMakefile211 $(eval $(call adreno_perfcntrs,a5xx,a5xx))
222 generated/a5xx.xml.h \
/linux/drivers/gpu/drm/msm/adreno/
H A Da5xx_catalog.c153 DECLARE_ADRENO_GPULIST(a5xx);
H A Da5xx_gpu.h13 #include "a5xx.xml.h"
H A Dadreno_gpu.h673 * For a5xx and a6xx targets load the zap shader that is used to pull the GPU
H A Da5xx_gpu.c1633 /* Dump the additional a5xx HLSQ registers */ in a5xx_show()
/linux/Documentation/devicetree/bindings/display/msm/
H A Dgpu.yaml105 For a5xx and a6xx devices this node contains a memory-region that
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da6xx.xml1366 Compared to a5xx and earlier, we just program the address of the first
2425 Compared to a5xx and before, we configure both a GMEM base and
2619 <!-- seems somewhat similar to what we called RB_CLEAR_CNTL on a5xx: -->
2809 <!-- unlike a5xx, these are per channel values rather than packed -->
3685 Starting with a5xx, position/psize outputs from shader end up in the
4433 <!-- looks to work in the same way as a5xx: -->
4470 Equiv to corresponding RB_2D_SRC_* regs on a5xx.. which were either