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/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dcpuctrl.yaml61 cpuctrl@a22000 {
/linux/arch/arm/boot/dts/hisilicon/
H A Dhisi-x5hd2.dtsi405 cpuctrl@a22000 {
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3798cv200.dtsi126 crg: clock-reset-controller@8a22000 {