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/linux/scripts/
H A Dmarkup_oops.pl2 # SPDX-License-Identifier: GPL-2.0-only
22 'cross-compile|c=s' => \$cross_compile,
28 my $kerver = `uname -r`;
49 if ($line =~ /EAX: ([0-9a-f]+) EBX: ([0-9a-f]+) ECX: ([0-9a-f]+) EDX: ([0-9a-f]+)/) {
55 if ($line =~ /ESI: ([0-9a-f]+) EDI: ([0-9a-f]+) EBP: ([0-9a-f]+) ESP: ([0-9a-f]+)/) {
60 if ($line =~ /RAX: ([0-9a-f]+) RBX: ([0-9a-f]+) RCX: ([0-9a-f]+)/) {
65 if ($line =~ /RDX: ([0-9a-f]+) RSI: ([0-9a-f]+) RDI: ([0-9a-f]+)/) {
70 if ($line =~ /RBP: ([0-9a-f]+) R08: ([0-9a-f]+) R09: ([0-9a-f]+)/) {
74 if ($line =~ /R10: ([0-9a-f]+) R11: ([0-9a-f]+) R12: ([0-9a-f]+)/) {
79 if ($line =~ /R13: ([0-9a-f]+) R14: ([0-9a-f]+) R15: ([0-9a-f]+)/) {
[all …]
H A Dcheckstack.pl2 # SPDX-License-Identifier: GPL-2.0
9 # s390 port and big speedup by Arnd Bergmann <arnd@bergmann-dalldorf.de>
21 # objdump -d vmlinux | scripts/checkstack.pl [arch] [min_stack]
44 $arch = `uname -m`;
53 $x = "[0-9a-f]"; # hex character
54 $xs = "[0-9a-f ]"; # hex character or space
57 #ffffffc0006325cc: a9bb7bfd stp x29, x30, [sp, #-80]!
59 $re = qr/^.*stp.*sp, ?\#-([0-9]{1,8})\]\!/o;
63 $re = qr/.*sub.*sp, sp, #([0-9]{1,4})/o;
72 # 2b6c: 4e56 fb70 linkw %fp,#-1168
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Ddenali,nand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - altr,socfpga-denali-nand
16 - socionext,uniphier-denali-nand-v5a
17 - socionext,uniphier-denali-nand-v5b
19 reg-names:
25 - const: nand_data
26 - const: denali_reg
[all …]
H A Dmediatek,mtk-nfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
15 - mediatek,mt2701-nfc
16 - mediatek,mt2712-nfc
17 - mediatek,mt7622-nfc
21 - description: Base physical address and size of NFI.
25 - description: NFI interrupt
[all …]
H A Dbrcm,brcmnand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
12 - William Zhang <william.zhang@broadcom.com>
15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
16 flash chips. It has a memory-mapped register interface for both control
18 is paired with a custom DMA engine (inventively named "Flash DMA") which
22 available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
[all …]
H A Dintel,lgm-ebunand.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/intel,lgm-ebunand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml
13 - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
17 const: intel,lgm-ebunand
22 reg-names:
24 - const: ebunand
25 - const: hsnand
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dfsl,fman.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
19 - fsl,fman
26 cell-index:
31 The cell-index value may be used by the SoC, to identify the
33 there's a description of the cell-index use in each SoC:
35 - P1023:
[all …]
H A Dethernet-phy-package.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy-package.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
13 PHY packages are multi-port Ethernet PHY of the same family
23 pattern: "^ethernet-phy-package@[a-f0-9]+$"
35 to a not attached PHY (offset 0).
37 '#address-cells':
40 '#size-cells':
[all …]
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,qe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
18 Basically, it is a bus of devices, that could act more or less
19 as a complete entity (UCC, USB etc ). All of them should be siblings on
27 - const: fsl,qe
28 - const: simple-bus
40 bus-frequency:
44 fsl,qe-num-riscs:
[all …]
/linux/arch/sparc/lib/
H A Dcopy_page.S1 /* SPDX-License-Identifier: GPL-2.0 */
16 /* What we used to do was lock a TLB entry into a specific
20 * we had to keep interrupts disabled for a long time.
23 * and this makes the cpu choose a slot all by itself.
24 * Then we do a normal TLB flush on exit. We need only
63 and %o2, %o3, %o0 ! vaddr D-cache alias bit
91 ba,pt %xcc, 9f
97 sethi %hi((PAGE_SIZE/64)-2), %o2
100 or %o2, %lo((PAGE_SIZE/64)-2), %o2
104 ldd [%o1 + 0x000], %f0
[all …]
/linux/tools/perf/
H A Dperf-iostat.sh2 # SPDX-License-Identifier: GPL-2.0
6 if [[ "$1" == "list" ]] || [[ "$1" =~ ([a-f0-9A-F]{1,}):([a-f0-9A-F]{1,2})(,)? ]]; then
12 perf stat --iostat$DELIMITER$*
/linux/Documentation/devicetree/bindings/arm/altera/
H A Dsocfpga-clk-manager.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dinh Nguyen <dinguyen@kernel.org>
20 - const: altr,clk-mgr
30 "#address-cells":
33 "#size-cells":
37 "^osc[0-9]$":
40 "^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$":
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,qoriq-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,qoriq-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 multiple phase locked loops (PLL) to create a variety of frequencies
16 which can then be passed to a variety of internal logic, including
24 --------------- -------------
30 The clockgen node should act as a clock provider, though in older device
36 - items:
[all …]
H A Dingenic,cgu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
11 typically includes a variety of PLLs, multiplexers, dividers & gates in order
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4755-cgu
26 - ingenic,jz4760-cgu
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dbrcm,twd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom's Timer-Watchdog (aka TWD)
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908,
15 registers layout). This block consists of: timers, watchdog and optionally a
21 - enum:
22 - brcm,bcm4908-twd
23 - brcm,bcm7038-twd
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Dingenic,tcu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 For a description of the TCU hardware and drivers, have a look at
11 Documentation/arch/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4760-tcu
24 - ingenic,jz4760b-tcu
[all …]
H A Dmrvl,mmp-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/mrvl,mmp-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
11 - Thomas Gleixner <tglx@linutronix.de>
12 - Rob Herring <robh@kernel.org>
16 pattern: '^timer@[a-f0-9]+$'
19 const: mrvl,mmp-timer
31 - compatible
[all …]
/linux/arch/powerpc/crypto/
H A Daes-tab-4k.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * crypto/aes_generic.c and are designed to be simply accessed by a combination
11 * of rlwimi/lwz instructions with a minimum of table registers (usually only
16 * For the safety-conscious it has to be noted that they might be vulnerable
19 * This is a quite good tradeoff for low power devices (e.g. routers) without
25 #define R(a, b, c, d) \ argument
26 0x##a##b##c##d, 0x##d##a##b##c, 0x##c##d##a##b, 0x##b##c##d##a
32 /* encryption table, same as crypto_ft_tab in crypto/aes-generic.c */
40 .long R(4d, ab, ab, e6), R(ec, 76, 76, 9a)
41 .long R(8f, ca, ca, 45), R(1f, 82, 82, 9d)
[all …]
/linux/arch/mips/kernel/
H A Dr2300_fpu.S8 * Multi-arch abstraction and asm macros for easier reading:
20 #include <asm/asm-offsets.h>
23 #define EX(a,b) \ argument
24 9: a,##b; \
25 .section __ex_table,"a"; \
26 PTR_WD 9b,fault; \
29 #define EX2(a,b) \ argument
30 9: a,##b; \
31 .section __ex_table,"a"; \
32 PTR_WD 9b,fault; \
[all …]
/linux/Documentation/devicetree/bindings/sram/
H A Dallwinner,sun4i-a10-system-control.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 by a regular node for the SRAM controller itself, with sub-nodes
19 "#address-cells":
22 "#size-cells":
27 - enum:
[all …]
/linux/arch/arm/include/asm/
H A Dkgdb.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 * GDB assumes that we're a user process being debugged, so
23 * we would loose the kernel's LR, which is a bad thing. This
26 * By doing this as an undefined instruction trap, we force a mode
29 * We also define a KGDB_COMPILED_BREAK which can be used to compile
30 * in breakpoints. This is important for things like sysrq-G and for
59 * r0-r15: 1 long word each
60 * f0-f7: unused, 3 long words each !!
64 * Even though f0-f7 and fps are not used, they need to be
66 * the host-side gdb.
[all …]
/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_array_access.c1 // SPDX-License-Identifier: GPL-2.0
53 __description("valid map access into an array with a constant")
60 *(u64*)(r10 - 8) = r1; \ in an_array_with_a_constant_1()
62 r2 += -8; \ in an_array_with_a_constant_1()
77 __description("valid map access into an array with a register")
84 *(u64*)(r10 - 8) = r1; \ in __flag()
86 r2 += -8; \ in __flag()
104 __description("valid map access into an array with a variable")
111 *(u64*)(r10 - 8) = r1; \ in __flag()
113 r2 += -8; \ in __flag()
[all …]
/linux/tools/testing/kunit/test_data/
H A Dtest_output_isolated_correctly.log1 Linux version 5.1.0-rc7-00061-g04652f1cb4aa0 (brendanhiggins@mactruck.svl.corp.google.com) (gcc ver…
5 Inode-cache hash table entries: 32768 (order: 6, 262144 bytes)
6 …(1734K kernel code, 489K rwdata, 396K rodata, 85K init, 216K bss, 29032K reserved, 0K cma-reserved)
7 SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
10 ------------[ cut here ]------------
12 posix-timer cpumask == cpu_all_mask, using cpu_possible_mask instead
13 CPU: 0 PID: 0 Comm: swapper Not tainted 5.1.0-rc7-00061-g04652f1cb4aa0 #163
32 [<600213f0>] ? block_signals+0x0/0x20
35 [<600213f0>] ? block_signals+0x0/0x20
42 ---[ end trace c83434852b3702d3 ]---
[all …]
/linux/Documentation/arch/xtensa/
H A Dmmu.rst9 (symbol defined), so it needs to be position-independent.
13 - This code fragment is run only on an MMU v3.
14 - TLBs are in their reset state.
15 - ITLBCFG and DTLBCFG are zero (reset state).
16 - RASID is 0x04030201 (reset state).
17 - PS.RING is zero (reset state).
18 - LITBASE is zero (reset state, PC-relative literals); required to be PIC.
24 - VA = virtual address (two upper nibbles of it);
25 - PA = physical address (two upper nibbles of it);
26 - pc = physical range that contains this code;
[all …]
/linux/Documentation/ABI/stable/
H A Dsysfs-class-tpm4 Contact: linux-integrity@vger.kernel.org
5 Description: The device/ directory under a specific TPM instance exposes
12 Contact: linux-integrity@vger.kernel.org
13 Description: The "active" property prints a '1' if the TPM chip is accepting
16 visible to the OS, but will only accept a restricted set of
24 Contact: linux-integrity@vger.kernel.org
32 Contact: linux-integrity@vger.kernel.org
41 Manufacturer is a hex dump of the 4 byte manufacturer info
42 space in a TPM. TCG version shows the TCG TPM spec level that
49 Contact: linux-integrity@vger.kernel.org
[all …]

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