Home
last modified time | relevance | path

Searched full:zynqmp (Results 1 – 25 of 90) sorted by relevance

1234

/freebsd/sys/contrib/device-tree/Bindings/soc/xilinx/
H A Dxilinx.yaml49 - xlnx,zynqmp-zc1751
50 - const: xlnx,zynqmp
54 - const: xlnx,zynqmp-zc1232-revA
55 - const: xlnx,zynqmp-zc1232
56 - const: xlnx,zynqmp
60 - const: xlnx,zynqmp-zc1254-revA
61 - const: xlnx,zynqmp-zc1254
62 - const: xlnx,zynqmp
66 - const: xlnx,zynqmp-zcu1275-revA
67 - const: xlnx,zynqmp-zcu1275
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dxilinx.yaml49 - xlnx,zynqmp-zc1751
50 - const: xlnx,zynqmp
54 - const: xlnx,zynqmp-zc1232-revA
55 - const: xlnx,zynqmp-zc1232
56 - const: xlnx,zynqmp
60 - const: xlnx,zynqmp-zc1254-revA
61 - const: xlnx,zynqmp-zc1254
62 - const: xlnx,zynqmp
66 - const: xlnx,zynqmp-zcu1275-revA
67 - const: xlnx,zynqmp-zcu1275
[all …]
/freebsd/sys/contrib/device-tree/Bindings/firmware/xilinx/
H A Dxlnx,zynqmp-firmware.yaml4 $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml#
12 description: The zynqmp-firmware node describes the interface to platform
13 firmware. ZynqMP has an interface to communicate with secure firmware.
24 const: xlnx,zynqmp-firmware
60 $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
66 $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml#
67 description: The ZynqMP MPSoC provides access to the hardware related data
72 $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml
73 description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
79 $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-smk-k26-revA.dts3 * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A
11 #include "zynqmp-sm-k26-revA.dts"
14 model = "ZynqMP SMK-K26 Rev2/1/B/A";
15 compatible = "xlnx,zynqmp-smk-k26-rev2",
16 "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB",
17 "xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26",
18 "xlnx,zynqmp";
H A Dzynqmp.dtsi3 * dts file for Xilinx ZynqMP
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
23 compatible = "xlnx,zynqmp";
139 zynqmp_ipi: zynqmp-ipi {
141 compatible = "xlnx,zynqmp-ipi-mailbox";
151 compatible = "xlnx,zynqmp-ipi-dest-mailbox";
195 zynqmp_firmware: zynqmp-firmware {
196 compatible = "xlnx,zynqmp-firmware";
[all …]
H A Dzynqmp-zc1275-revA.dts3 * dts file for Xilinx ZynqMP ZC1275
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
17 model = "ZynqMP ZC1275 RevA";
18 compatible = "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
H A Dzynqmp-zcu1275-revA.dts3 * dts file for Xilinx ZynqMP ZCU1275
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
17 model = "ZynqMP ZCU1275 RevA";
18 compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275", "xlnx,zynqmp";
H A Dzynqmp-zc1254-revA.dts3 * dts file for Xilinx ZynqMP ZC1254
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
17 model = "ZynqMP ZC1254 RevA";
18 compatible = "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254", "xlnx,zynqmp";
H A Dzynqmp-zcu102-rev1.1.dts3 * dts file for Xilinx ZynqMP ZCU102 Rev1.1
10 #include "zynqmp-zcu102-rev1.0.dts"
13 model = "ZynqMP ZCU102 Rev1.1";
14 compatible = "xlnx,zynqmp-zcu102-rev1.1", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
H A Dzynqmp-zcu102-rev1.0.dts3 * dts file for Xilinx ZynqMP ZCU102 Rev1.0
10 #include "zynqmp-zcu102-revB.dts"
13 model = "ZynqMP ZCU102 Rev1.0";
14 compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
H A Dzynqmp-zc1232-revA.dts3 * dts file for Xilinx ZynqMP ZC1232
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
16 model = "ZynqMP ZC1232 RevA";
17 compatible = "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232", "xlnx,zynqmp";
H A Dzynqmp-zcu102-revB.dts3 * dts file for Xilinx ZynqMP ZCU102 RevB
11 #include "zynqmp-zcu102-revA.dts"
14 model = "ZynqMP ZCU102 RevB";
15 compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
/freebsd/sys/contrib/device-tree/Bindings/power/reset/
H A Dxlnx,zynqmp-power.txt4 The zynqmp-power node describes the power management configurations.
8 - compatible: Must contain: "xlnx,zynqmp-power"
24 xlnx,zynqmp-ipi-mailbox.txt for typical controller that
34 zynqmp_firmware: zynqmp-firmware {
35 compatible = "xlnx,zynqmp-firmware";
38 zynqmp_power: zynqmp-power {
39 compatible = "xlnx,zynqmp-power";
48 zynqmp_firmware: zynqmp-firmware {
49 compatible = "xlnx,zynqmp-firmware";
52 zynqmp_power: zynqmp-power {
[all …]
H A Dxlnx,zynqmp-power.yaml4 $id: http://devicetree.org/schemas/power/reset/xlnx,zynqmp-power.yaml#
13 The zynqmp-power node describes the power management configurations.
18 const: xlnx,zynqmp-power
34 xlnx,zynqmp-ipi-mailbox.txt for typical controller that
59 zynqmp-firmware {
61 compatible = "xlnx,zynqmp-power";
72 zynqmp-firmware {
74 compatible = "xlnx,zynqmp-power";
/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dxlnx,zynqmp-aes.yaml4 $id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml#
7 title: Xilinx ZynqMP AES-GCM Hardware Accelerator
14 The ZynqMP AES-GCM hardened cryptographic accelerator is used to
19 const: xlnx,zynqmp-aes
29 zynqmp_firmware: zynqmp-firmware {
30 compatible = "xlnx,zynqmp-firmware";
32 xlnx_aes: zynqmp-aes {
33 compatible = "xlnx,zynqmp-aes";
/freebsd/sys/contrib/device-tree/Bindings/dma/xilinx/
H A Dxlnx,zynqmp-dpdma.yaml4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dpdma.yaml#
7 title: Xilinx ZynqMP DisplayPort DMA Controller
10 These bindings describe the DMA engine included in the Xilinx ZynqMP
25 The cell is the DMA channel ID (see dt-bindings/dma/xlnx-zynqmp-dpdma.h
29 const: xlnx,zynqmp-dpdma
61 #include <dt-bindings/power/xlnx-zynqmp-power.h>
64 compatible = "xlnx,zynqmp-dpdma";
H A Dxlnx,zynqmp-dma-1.0.yaml4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml#
7 title: Xilinx ZynqMP DMA Engine
10 The Xilinx ZynqMP DMA engine supports memory to memory transfers,
29 - xlnx,zynqmp-dma-1.0
78 #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
81 compatible = "xlnx,zynqmp-dma-1.0";
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dxlnx,zynqmp-psgtr.yaml4 $id: http://devicetree.org/schemas/phy/xlnx,zynqmp-psgtr.yaml#
7 title: Xilinx ZynqMP Gigabit Transceiver PHY
13 This binding describes the Xilinx ZynqMP Gigabit Transceiver (GTR) PHY. The
43 - xlnx,zynqmp-psgtr-v1.1
44 - xlnx,zynqmp-psgtr
85 const: xlnx,zynqmp-psgtr-v1.1
96 compatible = "xlnx,zynqmp-psgtr-v1.1";
/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dxlnx,zynqmp-pcap-fpga.txt2 The ZynqMP SoC uses the PCAP (Processor configuration Port) to configure the
6 - compatible: should contain "xlnx,zynqmp-pcap-fpga"
18 zynqmp_firmware: zynqmp-firmware {
19 compatible = "xlnx,zynqmp-firmware";
22 compatible = "xlnx,zynqmp-pcap-fpga";
H A Dxlnx,zynqmp-pcap-fpga.yaml4 $id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
14 The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
20 const: xlnx,zynqmp-pcap-fpga
30 zynqmp_firmware: zynqmp-firmware {
32 compatible = "xlnx,zynqmp-pcap-fpga";
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Ddwc3-xilinx.yaml17 - xlnx,zynqmp-dwc3
101 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
102 #include <dt-bindings/power/xlnx-zynqmp-power.h>
103 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
104 #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
105 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
114 compatible = "xlnx,zynqmp-dwc3";
/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dxlnx,zynqmp-reset.txt7 about zynqmp resets.
13 - compatible: "xlnx,zynqmp-reset" for Zynq UltraScale+ MPSoC platform
23 zynqmp_firmware: zynqmp-firmware {
24 compatible = "xlnx,zynqmp-firmware";
28 compatible = "xlnx,zynqmp-reset";
42 <dt-bindings/reset/xlnx-zynqmp-resets.h>
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dsynopsys.txt3 The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and 32-bit
15 - 'xlnx,zynqmp-ddrc-2.40a' : ZynqMP DDR ECC controller
18 Required properties for "xlnx,zynqmp-ddrc-2.40a":
28 compatible = "xlnx,zynqmp-ddrc-2.40a";
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dxlnx,zynqmp-gpio-modepin.yaml4 $id: http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
7 title: ZynqMP Mode Pin GPIO controller
20 const: xlnx,zynqmp-gpio-modepin
38 zynqmp-firmware {
40 compatible = "xlnx,zynqmp-gpio-modepin";
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dxlnx,zynqmp-clk.txt13 - compatible: Must contain: "xlnx,zynqmp-clk"
22 Input clocks for zynqmp Ultrascale+ clock controller:
46 include/dt-bindings/clock/xlnx-zynqmp-clk.h.
53 zynqmp_firmware: zynqmp-firmware {
54 compatible = "xlnx,zynqmp-firmware";
58 compatible = "xlnx,zynqmp-clk";

1234