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/linux/sound/soc/fsl/
H A Dfsl_xcvr.c115 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_arc_mode_put() local
119 xcvr->arc_mode = snd_soc_enum_item_to_val(e, item[0]); in fsl_xcvr_arc_mode_put()
128 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_arc_mode_get() local
130 ucontrol->value.enumerated.item[0] = xcvr->arc_mode; in fsl_xcvr_arc_mode_get()
160 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_capds_get() local
162 memcpy(ucontrol->value.bytes.data, xcvr->cap_ds, FSL_XCVR_CAPDS_SIZE); in fsl_xcvr_capds_get()
171 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_capds_put() local
173 memcpy(xcvr->cap_ds, ucontrol->value.bytes.data, FSL_XCVR_CAPDS_SIZE); in fsl_xcvr_capds_put()
218 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_mode_put() local
224 xcvr->mode = snd_soc_enum_item_to_val(e, item[0]); in fsl_xcvr_mode_put()
[all …]
H A DKconfig106 tristate "NXP Audio Transceiver (XCVR) module support"
112 Say Y if you want to add Audio Transceiver (XCVR) support for NXP
113 iMX CPUs. XCVR is a digital module that supports HDMI2.1 eARC,
/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra20-usb-phy.yaml161 nvidia,xcvr-setup:
165 description: Input of XCVR cell, HS driver output control.
167 nvidia,xcvr-setup-use-fuses:
171 nvidia,xcvr-lsfslew:
177 nvidia,xcvr-lsrslew:
183 nvidia,xcvr-hsslew:
249 - nvidia,xcvr-lsfslew
250 - nvidia,xcvr-lsrslew
253 - required: ["nvidia,xcvr-setup"]
254 - required: ["nvidia,xcvr-setup-use-fuses"]
[all …]
/linux/drivers/scsi/isci/
H A Dhost.c1982 struct scu_afe_transceiver __iomem *xcvr = &afe->scu_afe_xcvr[phy_id]; in sci_controller_afe_initialization() local
1993 writel(0x00004512, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
1996 writel(0x0050100F, &xcvr->afe_xcvr_control1); in sci_controller_afe_initialization()
2000 writel(0x00030000, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2004 writel(0x00010202, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2010 writel(0x00014500, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2014 writel(0x00010202, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2020 writel(0x0001C500, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2028 writel(0x000003F0, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
2030 writel(0x000003D7, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
[all …]
H A Dphy.c172 struct scu_afe_transceiver __iomem *xcvr = &afe->scu_afe_xcvr[phy_idx]; in sci_phy_link_layer_initialization() local
203 reg = readl(&xcvr->afe_xcvr_control0); in sci_phy_link_layer_initialization()
205 writel(reg, &xcvr->afe_xcvr_control0); in sci_phy_link_layer_initialization()
207 reg = readl(&xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
209 writel(reg, &xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
215 reg = readl(&xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
217 writel(reg, &xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1029 nvidia,xcvr-setup = <9>;
1030 nvidia,xcvr-lsfslew = <0>;
1031 nvidia,xcvr-lsrslew = <3>;
1034 nvidia,xcvr-hsslew = <12>;
1070 nvidia,xcvr-setup = <9>;
1071 nvidia,xcvr-lsfslew = <0>;
1072 nvidia,xcvr-lsrslew = <3>;
1075 nvidia,xcvr-hsslew = <12>;
1110 nvidia,xcvr-setup = <9>;
1111 nvidia,xcvr-lsfslew = <0>;
[all …]
H A Dtegra210.dtsi1970 nvidia,xcvr-setup = <9>;
1971 nvidia,xcvr-lsfslew = <0>;
1972 nvidia,xcvr-lsrslew = <3>;
1975 nvidia,xcvr-hsslew = <12>;
2008 nvidia,xcvr-setup = <9>;
2009 nvidia,xcvr-lsfslew = <0>;
2010 nvidia,xcvr-lsrslew = <3>;
2013 nvidia,xcvr-hsslew = <12>;
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-tx53.dtsi26 reg-can-xcvr = &reg_can_xcvr;
82 reg_can_xcvr: regulator-can-xcvr {
84 regulator-name = "CAN XCVR";
295 fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
H A Dimx6qdl-nitrogen6x.dtsi45 reg_can_xcvr: regulator-can-xcvr {
47 regulator-name = "CAN XCVR";
374 /* Flexcan XCVR enable */
H A Dimx6qdl-nitrogen6_som2.dtsi174 reg_can_xcvr: regulator-can-xcvr {
176 regulator-name = "CAN XCVR";
362 /* Flexcan XCVR enable */
H A Dimx6qdl-sabrelite.dtsi53 reg_can_xcvr: regulator-can-xcvr {
55 regulator-name = "CAN XCVR";
420 /* Flexcan XCVR enable */
H A Dimx6qdl-nitrogen6_max.dtsi74 reg_can_xcvr: regulator-can-xcvr {
76 regulator-name = "CAN XCVR";
435 /* Flexcan XCVR enable */
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124.dtsi1201 nvidia,xcvr-setup = <9>;
1202 nvidia,xcvr-lsfslew = <0>;
1203 nvidia,xcvr-lsrslew = <3>;
1206 nvidia,xcvr-hsslew = <12>;
1241 nvidia,xcvr-setup = <9>;
1242 nvidia,xcvr-lsfslew = <0>;
1243 nvidia,xcvr-lsrslew = <3>;
1246 nvidia,xcvr-hsslew = <12>;
1280 nvidia,xcvr-setup = <9>;
1281 nvidia,xcvr-lsfslew = <0>;
[all …]
H A Dtegra114.dtsi857 nvidia,xcvr-setup = <9>;
858 nvidia,xcvr-lsfslew = <0>;
859 nvidia,xcvr-lsrslew = <3>;
862 nvidia,xcvr-hsslew = <12>;
897 nvidia,xcvr-setup = <9>;
898 nvidia,xcvr-lsfslew = <0>;
899 nvidia,xcvr-lsrslew = <3>;
902 nvidia,xcvr-hsslew = <12>;
H A Dtegra114-tn7.dts259 nvidia,xcvr-setup = <7>;
260 nvidia,xcvr-lsfslew = <2>;
261 nvidia,xcvr-lsrslew = <2>;
H A Dtegra114-roth.dts989 nvidia,xcvr-setup = <7>;
990 nvidia,xcvr-lsfslew = <2>;
991 nvidia,xcvr-lsrslew = <2>;
1005 nvidia,xcvr-setup = <7>;
1006 nvidia,xcvr-lsfslew = <2>;
1007 nvidia,xcvr-lsrslew = <2>;
H A Dtegra30-asus-tf201.dts590 /delete-property/ nvidia,xcvr-setup-use-fuses;
591 nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */
595 /delete-property/ nvidia,xcvr-setup-use-fuses;
596 nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */
H A Dtegra20-acer-a500-picasso.dts1107 nvidia,xcvr-setup-use-fuses;
1108 nvidia,xcvr-lsfslew = <2>;
1109 nvidia,xcvr-lsrslew = <2>;
1118 nvidia,xcvr-setup-use-fuses;
1119 nvidia,xcvr-lsfslew = <2>;
1120 nvidia,xcvr-lsrslew = <2>;
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-tx28.dts77 reg_can_xcvr: regulator-can-xcvr {
79 regulator-name = "CAN XCVR";
484 tx28_flexcan_xcvr_pins: tx28-flexcan-xcvr-pins@0 {
/linux/drivers/net/ethernet/3com/
H A Dtyphoon.c1060 __le16 xcvr; in typhoon_set_link_ksettings() local
1065 xcvr = TYPHOON_XCVR_AUTONEG; in typhoon_set_link_ksettings()
1069 xcvr = TYPHOON_XCVR_10HALF; in typhoon_set_link_ksettings()
1071 xcvr = TYPHOON_XCVR_100HALF; in typhoon_set_link_ksettings()
1076 xcvr = TYPHOON_XCVR_10FULL; in typhoon_set_link_ksettings()
1078 xcvr = TYPHOON_XCVR_100FULL; in typhoon_set_link_ksettings()
1086 xp_cmd.parm1 = xcvr; in typhoon_set_link_ksettings()
1091 tp->xcvr_select = xcvr; in typhoon_set_link_ksettings()
H A D3c574_cs.c187 Xcvr = 7 << Xcvr_shift, enumerator
191 enum Window4 { /* Window 4: Xcvr/media bits. */
375 lp->default_media = (config & Xcvr) >> Xcvr_shift; in tc574_config()
1033 /* Provide ioctl() calls to examine the MII xcvr state. */
H A D3c509.c521 if (dev->mem_start & 0x05) { /* xcvr codes 1/3/4/12 */ in el3_common_init()
523 } else { /* xcvr codes 0/8 */ in el3_common_init()
1093 /* change XCVR type */ in el3_netdev_set_ecmd()
1270 /* xcvr=(0 || 4) OR user has an old 3c5x9 non "B" model */ in el3_up()
/linux/arch/arm/mach-omap2/
H A Dpdata-quirks.c208 pr_err("Unable to get CM T3517 WLAN XCVR NOE GPIO descriptor\n"); in omap3_sbc_t3517_wifi_init()
210 gpiod_set_consumer_name(d, "xcvr noe"); in omap3_sbc_t3517_wifi_init()
/linux/drivers/net/ethernet/sun/
H A Dsungem.h650 #define MIF_CFG_PSELECT 0x00000001 /* Xcvr slct: 0=mdio0 1=mdio1 */
653 #define MIF_CFG_PRADDR 0x000000f8 /* Xcvr poll register address */
656 #define MIF_CFG_PPADDR 0x00007c00 /* Xcvr poll PHY address */
677 #define MIF_STATUS_DATA 0xffff0000 /* Live image of XCVR reg */
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp.dtsi1595 xcvr: xcvr@30cc0000 { label
1596 compatible = "fsl,imx8mp-xcvr";
1603 interrupts = /* XCVR IRQ 0 */
1605 /* XCVR IRQ 1 */
1607 /* XCVR PHY - SPDIF wakeup IRQ */

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